Patent US3984620A successfully refreshed from Google Patents.
← Back to Patent Explorer
US3984620A Expired / Lapsed US ⏱️ 0.0 years remaining

Integrated circuit chip test and assembly package

Assignee: Raytheon Co
•
Filing: 1975-06-04
•
Granted: 1976-10-05
•
Expires: 1995-06-04
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A semiconductor integrated circuit device of the beam lead type having a semiconductor interconnection substrate with apertures for integrated circuit chips therein and with metallization patterns having sharply pointed ends for penetrating oxide layers over the bonding pads of the chips and for making electrical connection thereto. Devices thus produced may be assembled and tested and failed chips replaced as necessary before the chips are ultrasonically welded to the interconnection metallization and before final fabrication of the device. The invention also includes a method for producing an interconnection substrate in which a plurality of conically shaped holes are etched into a semiconductor wafer having sharp points within the body of the wafer. A metal layer is deposited over the surface of the semiconductor wafer filling the etched holes. Sharp points are thus formed on the metal in the etched holes. Apertures are then etched in the semiconductor wafer and the metal layer etched as required to provide sharply pointed connecting probes suspended above apertures in the semiconductor wafer.

Inventors

  • 👤 David R. Robillard
  • 👤 Robert L. Michals

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 15:11
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; G; G01; G01R; G01R31/00; G01R31/28; G01R31/2851; G01R31/2886; H10P; H10P74/00; H10P74/23; H10P74/232; H10W70/01; H10W70/05; H10W70/67; H10W70/69; H10W70/698; H10W72/00; H10W72/701; H10W72/071; H10W72/077; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49121

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 131 words
An integrated circuit device comprising in combination: a package subassembly, said package subassembly having a first set of conductive leads extending through at least one insulative portion of said package; and an interconnection substrate formed of semiconductor material having a layer of insulating material thereupon within said package subassembly, said interconnection substrate having a second set of conductive leads upon said layer of insulating material, one end of each of the leads of said second set of leads being coupled to a lead of said first set of leads, said interconnection substrate having at least one aperture therein, said aperture receiving an integrated circuit chip, a second end of each of said leads of said second set of leads being coupled to the external connection means of said integrated circuit chip.
Claim 2
Dependent Claim 131 words
An integrated circuit device comprising in combination: a package subassembly, said package subassembly having a first set of conductive leads extending through at least one insulative portion of said package; and an interconnection substrate formed of semiconductor material having a layer of insulating material thereupon within said package subassembly, said interconnection substrate having a second set of conductive leads upon said layer of insulating material, one end of each of the leads of said second set of leads being coupled to a lead of said first set of leads, said interconnection substrate having at least one aperture therein, said aperture receiving an integrated circuit chip, a second end of each of said leads of said second set of leads being coupled to the external connection means of said integrated circuit chip.
Claim 3
Dependent Claim 25 words
The combination of claim 1 wherein said second ends of each of said leads of said second set of leads have a substantially pointed tip.
Claim 4
Dependent Claim 21 words
The combination of claim 2 wherein said second set of leads and said external connection means each is formed of aluminum.
Claim 5
Dependent Claim 23 words
The combination of claim 3 wherein said integrated circuit chip and said interconnection substrate are formed of substantially the same type semiconductor material.
Claim 6
Dependent Claim 45 words
The combination of claim 4 wherein said package subassembly comprises: a ceramic base, said interconnection substrate being positioned upon said ceramic base; an insulating spacer disposed on said ceramic base surrounding said substrate and bonded to said base; and a lid bonded to said spacer.
Claim 7
Dependent Claim 14 words
The combination of claim 5 wherein said insulating spacer is formed of ceramic material.

References Cited (Backward Citations)

US3256465A Cited
US3436604A Cited
US3381372A Cited
US3577037A Cited
US3825801A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-10-05 1980-04-05 1980-10-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-10-05 1984-04-05 1984-10-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-10-05 1988-04-05 1988-10-05 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag