Asynchronous status interlock circuit for interface adaptor

Abstract

Abstract An asynchronous interlock circuit for an interface adaptor circuit in a digital system includes a D-type latch, a D-type flip-flop, and an RS-type flip-flop interconnected to accept a peripheral status input from a peripheral equipment unit, a read status input and a read data input derived from control and selection inputs to the interface adaptor from a microprocessor unit of the digital system. The asynchronous interlock circuit stores information corresponding to a logical "1" on the peripheral status interrupt input in the D-type flip-flop, even if the latter signal disappears prior to acknowledgment by the microprocessor of a corresponding interrupt signal generated by the interface adaptor circuit. The D-type flip-flop is reset by a sequence of a read status signal and a read data signal, thereby avoiding problems which could arise if the peripheral status input remains at a logical "1" even after acknowledgment by the microprocessor unit of an interrupt signal generated by the interface adaptor. If a status change occurs on the peripheral status input while status is being read, the D-type latch is inhibited and the status change is not accepted until the read status operation is complete. RELATED APPLICATIONS This application is related to assignee's copending U.S. patent application Ser. No. 519,138 "Interface Adaptor Architecture", Ser. No. 519,150 "Microprocessor Architecture", and Ser. No. 519,149 "Microprocessor System" by Bennett et al., all filed on Oct. 30, 1974, and to assignee's copending U.S. patent applications, "Asynchronous Communications Interface Adaptor", Ser. No. 550,336, "Logic Circuitry for Selection of Dedicated Registers", Ser. No. 550,338, "Interrupt Status Indication Logic for Polled Interrupt Digital System", Ser. No. 550,340, and "Digital System with Peripheral Control of Interface Adaptor", Ser. No. 550,311, all by Hepworth et. al. BACKGROUND OF THE INVENTION A large number of minicomputers are presently available. More recently, microcomputers utilizing bidirectional data busses have become available. A variety of specialized circuits in integrated circuit form have been utilized to interface between such bidirectional data busses and a variety of peripheral devices controlled by and interacting with microcomputers, such as, keyboards, printers, control displays, readers, plotters, etc. Circuits have also been provided to interface between bidirectional data busses and modems (modulator-demodulator) to allow the microcomputer to control remote equipment over a telephone line by converting data in a parallel word format to a serial word format, supplying signals representing the serial word format to a modem which sends data over a telephone line. Such modem circuits also receive data in a serial format from a telephone line, and transfer the data to an adaptor circuit which changes the data from the serial word format to a parallel word format and write it onto the bidirectional data bus. The MOS (metal-oxide-semiconductor) technology has been utilized to provide a microcomputer using microprocessor unit chips (MPU's) integrated on a single semiconductor chip. Integrated circuit random access memory chips (RAM) and read only memory (ROM) chips and suitable interface adaptor chips for coupling the bidirectional data bus to peripheral equipment have also been provided by the MOS technology. Thereby, the power of computer data processing is made available at very low cost for use in a wide variety of industrial communications equipment. However, to take advantage of such low cost microcomputer systems to the fullest extent, it is often necessary to provide an efficient means of interfacing between the system data bus and peripheral devices which transmit and receive data asynchronously. In the past, in order to permit communication between a bidirectional data bus and, for example, a modem, integrated circuits capable of providing both serial-to-parallel conversion for a receiving section thereof and parallel-to-serial conversion for a transmitting section thereof on a single chip, along with formating circuitry have been utilized. It has been necessary to provide additional complex bus interface circuitry, separate from said chip, which is capable of receiving data from and transmitting data onto the bidirectional data bus and accepting or receiving data from said chip. This has required additional semiconductor packages, lower component density of the final product, and consequently higher costs.

Inventors

• 👤 Edward C. Hepworth
• 👤 Rodney J. Means

Bibliographic Details