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US3976949A Expired / Lapsed US ⏱️ 0.0 years remaining

Edge sensitive set-reset flip flop

Assignee: Motorola Solutions Inc
•
Filing: 1975-01-13
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Granted: 1976-08-24
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Expires: 1995-01-13
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Abstract

Abstract An edge sensitive set-reset flip-flop is implemented by providing a conventional cross-coupled coincident gate flip-flop with an input means consisting of an inverter, a noninverting delay element and a coincident gate. The input means buffers binary input signals such that the cross-coupled coincident flip-flop will change state only in response to binary transitions of a prescribed direction.

Inventors

  • 👤 Edward C. Hepworth
  • 👤 Rodney J. Means

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 04:53
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/027; H03K3/037; H03K3/353; H03K3/356; H03K3/356017

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 107 words
A digital circuit comprising: a. a first input terminal; b. memory means having a first memory input for storing a digital representation of a predetermined input signal transition on said first input terminal; c. a first coincident gate having an output coupled to said first memory input and having a first and a second gate input; d. a first non-inverting delay element having an output coupled to said first gate input and having a first delay input; e. an inverting element having an output coupled to said delay input and having an input coupled to said first input terminal and also coupled to said second gate input.
Claim 2
Dependent Claim 107 words
A digital circuit comprising: a. a first input terminal; b. memory means having a first memory input for storing a digital representation of a predetermined input signal transition on said first input terminal; c. a first coincident gate having an output coupled to said first memory input and having a first and a second gate input; d. a first non-inverting delay element having an output coupled to said first gate input and having a first delay input; e. an inverting element having an output coupled to said delay input and having an input coupled to said first input terminal and also coupled to said second gate input.
Claim 3
Dependent Claim 116 words
A digital system as recited in claim 1 further comprising: a. a second input terminal; b. a second memory input for storing a digital representation of a predetermined input signal transition on said second input terminal within said memory means; c. a second coincident gate having an output coupled to said second memory input and having a third and a fourth gate input; d. a second non-inverting delay element having an output coupled to said third gate input and having a second delay input; e. a second inverting element having an output coupled to said second delay input and having an input coupled to said second input terminal and also coupled to said fourth gate input.
Claim 4
Dependent Claim 16 words
The digital circuit recited in claim 1 wherein: a. said memory means is a flip-flop circuit.
Claim 5
Dependent Claim 27 words
The digital circuit recited in claim 3 further comprising: a. level sensitive direct reset means coupled to said flip-flop and also coupled to said first coincident gate.
Claim 6
Dependent Claim 15 words
The digital circuit recited in claim 4 wherein: a. said coincident gates are NOR gates.
Claim 7
Dependent Claim 44 words
The digital circuit recited in claim 5 wherein said NOR gate includes: a. a load MOSFET, b. an output terminal coupled to said load MOSFET, c. a switching MOSFET coupled to said load MOSFET, and d. an input terminal coupled to said switching MOSFET.

References Cited (Backward Citations)

US3234401A Cited
GB1185938A Cited
US3515901A Cited
US3757231A Cited
US3613017A Cited
US3753014A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-08-24 1980-02-23 1980-08-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-08-24 1984-02-23 1984-08-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-08-24 1988-02-23 1988-08-24 $7700.00 Window Closed / Lapsed

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