Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
274 words
A monostable pulse generator comprising first and second bistable circuits each having a first input for switching the state of said bistable circuit in response to a shift in level in excess of a threshold level on said first input in a first direction, and a second input for switching the state of said bistable circuit in response to a shift in level on said second input in a second direction, means for applying a trigger pulse in said second direction to the second input of said first bistable circuit, the output of said first bistable circuit responding to said trigger pulse for shifting the level thereon in said first direction, means applying said first bistable circuit output to said first and second input of said second bistable circuit, said second bistable circuit responsive to said first direction level shift of said first bistable circuit output for shifting the level of the output of said second bistable circuit in said first direction, capacitive storage means coupled to said second bistable circuit output and responsive to said shift in level thereon for producing an output level increasing exponentially over a time period in said first direction, and means coupling said storage means output level to the first input of said first bistable circuit, said first bistable circuit output undergoing a shift in level in said second direction as said level applied to said first input of said first bistable circuit exceeds said threshold level of said first bistable circuit, said second bistable circuit responsive to said latter shift in level through said second input thereof for restoring said second bistable circuit to its initial condition.
Claim 2
Dependent Claim
274 words
A monostable pulse generator comprising first and second bistable circuits each having a first input for switching the state of said bistable circuit in response to a shift in level in excess of a threshold level on said first input in a first direction, and a second input for switching the state of said bistable circuit in response to a shift in level on said second input in a second direction, means for applying a trigger pulse in said second direction to the second input of said first bistable circuit, the output of said first bistable circuit responding to said trigger pulse for shifting the level thereon in said first direction, means applying said first bistable circuit output to said first and second input of said second bistable circuit, said second bistable circuit responsive to said first direction level shift of said first bistable circuit output for shifting the level of the output of said second bistable circuit in said first direction, capacitive storage means coupled to said second bistable circuit output and responsive to said shift in level thereon for producing an output level increasing exponentially over a time period in said first direction, and means coupling said storage means output level to the first input of said first bistable circuit, said first bistable circuit output undergoing a shift in level in said second direction as said level applied to said first input of said first bistable circuit exceeds said threshold level of said first bistable circuit, said second bistable circuit responsive to said latter shift in level through said second input thereof for restoring said second bistable circuit to its initial condition.
Claim 3
Dependent Claim
64 words
The combination of claim 1 wherein each of said bistable circuits are D-type flip-flops, each said first input being a clock input, each said second input being a set input, and each further including a delay input and a reset input, means connecting both said delay inputs to a first reference point, and means connecting both said reset inputs to a second reference point.
Claim 4
Dependent Claim
41 words
The combination of claim 1 wherein said storage means comprises a capacitor and resistor series connected between a point of potential and a reference point, and said second bistable circuit output is connected to the junction of said resistor and capacitor.
Claim 5
Dependent Claim
41 words
The combination of claim 2 wherein said storage means comprises a capacitor and resistor series connected between a point of potential and said reference point, and said second bistable circuit output is connected to the junction of said resistor and capacitor.