US3975752A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Junction field effect transistor
Assignee: Harris Corp
•
Filing: 1975-11-13
•
Granted: 1976-08-17
•
Expires: 1995-11-13
Abstract
Abstract A junction field effect transistor having a V-shaped upper gate, dividing said planar source and drain regions, formed by etching a (100) crystal oriented semiconductor material of one conductivity type and diffusing with material of opposite conductivity type.
Inventors
- 👤 Hugh Crawford Nicolay
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 16:53
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/80; H10D30/83; H10D62/00; H10D62/10; H10D62/17; H10D62/343; Y; Y10; Y10S; Y10S148/00; Y10S148/051; Y10S148/053; Y10S148/085; Y10S148/115
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
105 words
A junction field effect transistor comprising: a. a substrate of semiconductor material of one conductivity type having a planar surface and constituting a first gate; b. a first and second planar regions adjacent said surface of opposite conductivity type to said one conductivity type and constituting a source region and a drain region; c. a third region of opposite conductivity type to said one conductivity connecting said first and second regions below said surface and constituting a channel region; and d. a wedged-shaped fourth region of said one conductivity type separating said first and second regions above said third region, and constituting a second gate.
Claim 2
Dependent Claim
105 words
A junction field effect transistor comprising: a. a substrate of semiconductor material of one conductivity type having a planar surface and constituting a first gate; b. a first and second planar regions adjacent said surface of opposite conductivity type to said one conductivity type and constituting a source region and a drain region; c. a third region of opposite conductivity type to said one conductivity connecting said first and second regions below said surface and constituting a channel region; and d. a wedged-shaped fourth region of said one conductivity type separating said first and second regions above said third region, and constituting a second gate.
Claim 3
Dependent Claim
18 words
A junction field effect transistor as in claim 1 wherein said fourth region comprises a V-shaped groove region.
Claim 4
Dependent Claim
24 words
A junction field effect transistor as in claim 2 wherein said V-shaped groove region contours a V-shaped cross sectional opening in said planar surface.
Claim 5
Dependent Claim
27 words
A junction field effect transistor as in claim 3 wherein said V-shaped opening has a width of approximately 0.33 mils and a depth of approximately 0.23 mils.
Claim 6
Dependent Claim
32 words
A junction field effect transistor as in claim 3 wherein said V-shaped groove region has a depth in the range of 1 to 5 microns from the surface of said V-shaped opening.
Claim 7
Dependent Claim
26 words
A junction field effect transistor as in claim 1 wherein fourth region has a width of approximately 0.33 mils and a depth of approximately 0.23 mils.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-08-17 | 1980-02-16 | 1980-08-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-08-17 | 1984-02-16 | 1984-08-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-08-17 | 1988-02-16 | 1988-08-17 | $7700.00 | Window Closed / Lapsed |