US3974516A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of manufacturing a semiconductor device having at least one insulated gate field effect transistor, and semiconductor device manufactured by using the method
Assignee: US Philips Corp
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Filing: 1974-12-19
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Granted: 1976-08-10
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Expires: 1994-12-19
Abstract
Abstract A method of manufacturing a semiconductor device having an insulated gate field effect transistor in which a second region of the second conductivity type is indiffused in a first region of the first conductivity type and source and drain zones of the first conductivity type are provided in said second region. According to the invention, after the indiffusion, the doping material of the second region is outdiffused in an atmosphere of reduced pressure, preferably in a vacuum, in which a zone of maximum doping concentration is formed which may advantageously be used as a channel stopper and the source and drain zones are provided in the part of the second region having a doping concentration which increases from the surface. The method is preferably used for the manufacture of structures having complementary field effect transistors.
Inventors
- 👤 Walter Steinmaier
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 15:05
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/102; H10D62/112; H10D84/00; H10D84/01; H10D84/0107; H10D84/0109; H10D84/02; H10D84/03; H10D84/038; H10D84/40; H10D84/401; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/858; H10P; H10P32/00; H10P32/10; H10P32/12; H10P32/17; H10P32/171
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
165 words
A semiconductor device including an insulated gate field effect transistor, comprising: a. a semiconductor body comprising a major surface and having a first region of first conductivity type and a second region of second conductivity type located at said semiconductor surface, said second region being located adjacent to said first region so as to form therewith a p-n junction that terminates at said semiconductor surface and containing a zone of maximum second conductivity type doping impurity concentration, said second region comprising a positive doping concentration gradient between said maximum concentration zone and said semiconductor surface, and b. source and drain zones of said transistor located completely in and surrounded in said body by the portion of said second region exhibiting said positive doping concentration gradient and a channel zone of said transistor located completely withing said positive doping gradient portion, whereby the concentration of said second impurity type material in said positive doping gradient portion increases from said semiconductor surface toward said maximum concentration zone.
Claim 2
Dependent Claim
165 words
A semiconductor device including an insulated gate field effect transistor, comprising: a. a semiconductor body comprising a major surface and having a first region of first conductivity type and a second region of second conductivity type located at said semiconductor surface, said second region being located adjacent to said first region so as to form therewith a p-n junction that terminates at said semiconductor surface and containing a zone of maximum second conductivity type doping impurity concentration, said second region comprising a positive doping concentration gradient between said maximum concentration zone and said semiconductor surface, and b. source and drain zones of said transistor located completely in and surrounded in said body by the portion of said second region exhibiting said positive doping concentration gradient and a channel zone of said transistor located completely withing said positive doping gradient portion, whereby the concentration of said second impurity type material in said positive doping gradient portion increases from said semiconductor surface toward said maximum concentration zone.
Claim 3
Dependent Claim
22 words
A semiconductor device as defined in claim 1, further comprising a complementary insulated gate field effect transistor located in said first region.
Claim 4
Dependent Claim
45 words
A semiconductor device as recited in claim 1, wherein said semiconductor body comprises isolation zones of said second conductivity type, said isolation zones being located at said semiconductor surface and separating said first region from a surface semiconductor body region of said first conductivity type.
Claim 5
Dependent Claim
16 words
A semiconductor device as recited in claim 3, wherein said first region comprises a bipolar transistor.
Claim 6
Dependent Claim
60 words
A semiconductor device as recited in claim 1, wherein the maximum concentration of said second conductivity type impurity at said maximum concentration zone is at least 10 18 atoms per cubic centimeter and the surface concentration of said second conductivity type impurity at said positive doping gradient portion is at most about 5 × 10 16 atoms per cubic centimeter.
Claim 7
Dependent Claim
32 words
A semiconductor device as in claim 3, further comprising a second conductivity type substrate region on which said first and second regions are disposed, said isolation zones extending to said substrate region.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-08-10 | 1980-02-09 | 1980-08-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-08-10 | 1984-02-09 | 1984-08-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-08-10 | 1988-02-09 | 1988-08-10 | $7700.00 | Window Closed / Lapsed |