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US3973571A Expired / Lapsed US ⏱️ 0.0 years remaining

Circuit arrangement for an automatic integrated intravaginal stimulator

Assignee: GORENJE TOVARNA GOSPODINJSKE OPREME
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Filing: 1975-08-14
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Granted: 1976-08-10
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Expires: 1995-08-14
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Abstract

Abstract An intravaginal stimulator is provided for correcting urinary incontinence which employs a plurality of transistors to form an oscillator with the load formed by the user in series with the battery whereby the circuit is rendered inactive until placed in use.

Inventors

  • 👤 Peter Suhel

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 01:38
CPC Classifications
A; A61; A61N; A61N1/00; A61N1/18; A61N1/32; A61N1/36; A61N1/36007; H; H03; H03K; H03K3/00; H03K3/02; H03K3/26; H03K3/28; H03K3/281; H03K3/282; H03K3/2826; H03K3/2828

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 310 words
Circuit arrangement for an automatic integrated intravaginal stimulator, characterized in that to the positive terminal of the battery (U b ) there is connected the emitter of the transistor (T 1 ), one terminal of the resistors (R 1 , R 4 , R 5 ) and the positive terminal of the electrolytic capacitor (C 3 ), and that the collector of the transistor (T 1 ) is together with the collector of the transistor (T 2 ) connected to one terminal of the capacitor (C 2 ) and at the same time to the junction point of the cathode of the diode (D) and one terminal of the resistor (R 6 ), whereby the base of the transistor (T 1 ) is connected to the emitter of the transistor (T 2 ), while the base of the transistor (T 2 ) is connected to the junction point of the other terminal of the resistor (R 1 ) and one terminal of the resistor (R 2 ), the other terminal being connected to one terminal of the resistor (R 3 ), whose other terminal is over the capacitor (C 1 ) connected to the junction point of the other terminal of the resistor (R 4 ) and the collector of the transistor (T 3 ), whose base is connected to the junction point of the other terminal of the resistor (R 5 ) and the capacitor (C 2 ) and whose emitter is connected to the junction point of the negative terminal of the electrolytic capacitor (C 3 ) and the anode of the diode (D), while the negative terminal of the battery (U b ) is connected to the connector (1) for the load (R s ) and the other terminal of the resistor (R 6 ) is connected to the connector (2) for the load (R s ).
Claim 2
Dependent Claim 310 words
Circuit arrangement for an automatic integrated intravaginal stimulator, characterized in that to the positive terminal of the battery (U b ) there is connected the emitter of the transistor (T 1 ), one terminal of the resistors (R 1 , R 4 , R 5 ) and the positive terminal of the electrolytic capacitor (C 3 ), and that the collector of the transistor (T 1 ) is together with the collector of the transistor (T 2 ) connected to one terminal of the capacitor (C 2 ) and at the same time to the junction point of the cathode of the diode (D) and one terminal of the resistor (R 6 ), whereby the base of the transistor (T 1 ) is connected to the emitter of the transistor (T 2 ), while the base of the transistor (T 2 ) is connected to the junction point of the other terminal of the resistor (R 1 ) and one terminal of the resistor (R 2 ), the other terminal being connected to one terminal of the resistor (R 3 ), whose other terminal is over the capacitor (C 1 ) connected to the junction point of the other terminal of the resistor (R 4 ) and the collector of the transistor (T 3 ), whose base is connected to the junction point of the other terminal of the resistor (R 5 ) and the capacitor (C 2 ) and whose emitter is connected to the junction point of the negative terminal of the electrolytic capacitor (C 3 ) and the anode of the diode (D), while the negative terminal of the battery (U b ) is connected to the connector (1) for the load (R s ) and the other terminal of the resistor (R 6 ) is connected to the connector (2) for the load (R s ).
Claim 3
Dependent Claim 29 words
Circuit arrangement according to claim 1, characterized in that the transistors (T 1 , T 2 ) are PNP-transistors and that the transistor (T 3 ) is a NPN-transistor.
Claim 4
Dependent Claim 18 words
Circuit arrangement according to claim 1, characterized in that the resistor (R 2 ) is a variable resistor.

References Cited (Backward Citations)

US3241557A Cited
US3351872A Cited
US3380002A Cited
GB1145749A Cited
US3579139A Cited
US3478248A Cited
US3800800A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-08-10 1980-02-09 1980-08-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-08-10 1984-02-09 1984-08-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-08-10 1988-02-09 1988-08-10 $7700.00 Window Closed / Lapsed

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