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US3970951A Expired / Lapsed US ⏱️ 0.0 years remaining

Differential amplifier with constant gain

Assignee: International Business Machines Corp
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Filing: 1975-11-12
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Granted: 1976-07-20
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Expires: 1995-11-12
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Abstract

Abstract The subject of this invention is a differential amplifier circuit having a constant gain characteristic over a range of input voltage and suitable for use in integrated circuits in semi-conductor chips. The circuit is embodied in the enhanced-depleted field effect transistor technology and includes a pair of parallel circuits. Each circuit has a depletion type of field effect transistor (FET) connected to the drain voltage source, and its source connected to the drains of two enhanced FET's and to the gate of the one of these which has its source to a ground level. The other enhanced FET's have their sources connected together and to a constant current source. One gate of these other FET's is connected to the reference voltage and the other to an input voltage to be amplified. By a proper selection of FET design parameters, the amplifier gain can be constant over the full operating range of the input voltage.

Inventors

  • 👤 Charles Reeves Hoffman

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 15:17
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45076

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 184 words
A constant gain differential amplifier circuit for integrated circuit use, said circuit comprising: a semi-conductive substrate; a source of voltage having a drain supply terminal and a source supply terminal; a pair of depletion type transistors deposited in said substrate and having their drain electrodes connected to said drain supply; a pair of enhancement type transistors also deposited in said substrate, and each having its drain connected to the source and gate of an associated one of said depletion type transistors; a connection from the gate of one of said enhancement type transistors to a source of a reference voltage; a connection from the gate of the other of said enhancement type transistors to an input signal voltage to be amplified; a constant current control interposed between said source supply terminal and the sources of both said enhancement type transistors; and a gain control transistor for each pair of associated depletion-enhancement type transistors, each said gain control transistor having its drain and its gate connected to the source-drain junction of its associated pair of transistors and its source connected to said reference voltage source.
Claim 2
Dependent Claim 184 words
A constant gain differential amplifier circuit for integrated circuit use, said circuit comprising: a semi-conductive substrate; a source of voltage having a drain supply terminal and a source supply terminal; a pair of depletion type transistors deposited in said substrate and having their drain electrodes connected to said drain supply; a pair of enhancement type transistors also deposited in said substrate, and each having its drain connected to the source and gate of an associated one of said depletion type transistors; a connection from the gate of one of said enhancement type transistors to a source of a reference voltage; a connection from the gate of the other of said enhancement type transistors to an input signal voltage to be amplified; a constant current control interposed between said source supply terminal and the sources of both said enhancement type transistors; and a gain control transistor for each pair of associated depletion-enhancement type transistors, each said gain control transistor having its drain and its gate connected to the source-drain junction of its associated pair of transistors and its source connected to said reference voltage source.
Claim 3
Dependent Claim 44 words
An amplifier circuit as set out in claim 1, in which: each said gain control transistor is of the enhancement type and is of such proportion as to conduct only a comparatively small portion of the current passing through its associated depletion type transistor.
Claim 4
Dependent Claim 214 words
In a constant gain differential amplifier circuit; a constant current supply circuit having a drain terminal and a source terminal and including a current control device; a pair of depletion type field effect transistors, each having its drain connected to said drain terminal and its gate connected to its source; a pair of enhancement type field effect transistors, each having its source connected to said source terminal; a connection between the source of one of said depletion type transistors and the drain of one of said enhancement type transistors; a third enhancement type transistor having its gate and its drain connected to said connection and its source connected to a reference voltage; a second connection between the source of the other of said depletion type transistors and the drain of the other of said enhancement type transistors; a fourth enhancement type transistor having its gate and its drain connected to said second connection and its source connected to said reference voltage; a conductor connecting the gate of said one of said enhancement type transistors to an input signal voltage to be amplified; a conductor connecting the gate of said other of said enhancement type transistors to said reference voltage; and an output signal conductor connected to said drain of said other enhancement type transistor.
Claim 5
Dependent Claim 214 words
In a constant gain differential amplifier circuit; a constant current supply circuit having a drain terminal and a source terminal and including a current control device; a pair of depletion type field effect transistors, each having its drain connected to said drain terminal and its gate connected to its source; a pair of enhancement type field effect transistors, each having its source connected to said source terminal; a connection between the source of one of said depletion type transistors and the drain of one of said enhancement type transistors; a third enhancement type transistor having its gate and its drain connected to said connection and its source connected to a reference voltage; a second connection between the source of the other of said depletion type transistors and the drain of the other of said enhancement type transistors; a fourth enhancement type transistor having its gate and its drain connected to said second connection and its source connected to said reference voltage; a conductor connecting the gate of said one of said enhancement type transistors to an input signal voltage to be amplified; a conductor connecting the gate of said other of said enhancement type transistors to said reference voltage; and an output signal conductor connected to said drain of said other enhancement type transistor.
Claim 6
Dependent Claim 59 words
A constant gain differential amplifier as set out in claim 3, in which said third and said fourth enhancement type transistors conduct only a small but a significant part of the current passing through said connected depletion type transistor to substantially eliminate any variation in the gain of said amplifier as the voltage of said input signal is varied.

References Cited (Backward Citations)

US3700981A Cited
US3832644A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-07-20 1980-01-19 1980-07-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-07-20 1984-01-19 1984-07-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-07-20 1988-01-19 1988-07-20 $7700.00 Window Closed / Lapsed

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