Patent US3970948A successfully refreshed from Google Patents.
← Back to Patent Explorer
US3970948A Expired / Lapsed US ⏱️ 0.0 years remaining

Controller gain signal amplifier

Assignee: RCA Licensing Corp
•
Filing: 1974-12-06
•
Granted: 1976-07-20
•
Expires: 1994-12-06
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A signal amplifier is supplied with input signals at its base electrode and also is supplied at its emitter with quiescent operating current from a current source. Amplified output signals developed at the collector of the amplifier are coupled to a transistor-diode current splitter. The relative division of current in the splitter is controlled by coupling a variable direct current supply to the diode. The latter supply comprises a source of direct voltage, a variable, resistive voltage divider coupled across the voltage source, and the combination of a voltage follower stage and a series resistor coupled between the resistive divider and the diode. Gain controlled push-pull output signals may be provided by differentially coupling a second amplifier device to the first and coupling the output of a second current splitter to the second amplifier. The second current splitter is then also controlled by the same current source as the first.

Inventors

  • 👤 Leopold Albert Harwood
  • 👤 Erwin Johann Wittmann

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 16:33
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/02; H03G3/04; H03G3/10; H03G1/00; H03G1/0005; H03G1/0035; H03G1/0052; H04; H04N; H04N9/00; H04N9/64; H04N9/68

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 292 words
A controllable gain signal amplifier comprising: a source of signals, a first signal amplification stage comprising at least a first transistor having a signal input electrode coupled to said source of signals and a main current conduction path including second and third electrodes, a source of quiescent operating current coupled to said second electrode, a first current splitter circuit comprising at least a first semiconductor rectifier device providing a first current path and a second transistor having a main current conduction path, said main conduction path of said second transistor and said first current path of said first rectifier device being coupled to said third electrode of said first transistor and being similarly poled for current conduction with respect to said third electrode, at least one output load circuit coupled to said main conduction path of said second transistor, and gain controlling means direct current coupled to said first rectifier device for proportioning the relative flow of current of said first transistor through said first current path and said main conduction path of said second transistor, said means comprising a source of direct voltage, a variable voltage divider coupled across said direct voltage source and having an output terminal at which a selected portion of said voltage is provided, coupling means comprising at least a third transistor having a base electrode direct current coupled to said output terminal and an emitter electrode, said coupling means further comprising a resistance direct current coupled between said last-named emitter electrode and said first rectifier device for supplying a controllable direct current to said device and thereby proportioning the flow of current through said first rectifier device and said second transistor, whereby the signal gain associated with said second transistor and said load circuit is varied.
Claim 2
Dependent Claim 292 words
A controllable gain signal amplifier comprising: a source of signals, a first signal amplification stage comprising at least a first transistor having a signal input electrode coupled to said source of signals and a main current conduction path including second and third electrodes, a source of quiescent operating current coupled to said second electrode, a first current splitter circuit comprising at least a first semiconductor rectifier device providing a first current path and a second transistor having a main current conduction path, said main conduction path of said second transistor and said first current path of said first rectifier device being coupled to said third electrode of said first transistor and being similarly poled for current conduction with respect to said third electrode, at least one output load circuit coupled to said main conduction path of said second transistor, and gain controlling means direct current coupled to said first rectifier device for proportioning the relative flow of current of said first transistor through said first current path and said main conduction path of said second transistor, said means comprising a source of direct voltage, a variable voltage divider coupled across said direct voltage source and having an output terminal at which a selected portion of said voltage is provided, coupling means comprising at least a third transistor having a base electrode direct current coupled to said output terminal and an emitter electrode, said coupling means further comprising a resistance direct current coupled between said last-named emitter electrode and said first rectifier device for supplying a controllable direct current to said device and thereby proportioning the flow of current through said first rectifier device and said second transistor, whereby the signal gain associated with said second transistor and said load circuit is varied.
Claim 3
Dependent Claim 36 words
A controllable gain signal amplifier according to claim 1 wherein: said source of direct voltage and said resistance are selected to provide a maximum direct current to said rectifier device proportional to said quiescent operating current.
Claim 4
Dependent Claim 25 words
A controllable gain signal amplifier according to claim 2 wherein: said maximum direct current is sufficient to substantially cut off conduction in said second transistor.
Claim 5
Dependent Claim 201 words
A controllable gain signal amplifier according to claim 1 wherein: said signal amplification stage further comprises a fourth transistor having a main current conduction path including second and third electrodes and coupled to said first transistor in a differential signal amplification arrangement, a second current splitter circuit comprising a second semiconductor rectifier device providing a second current path and a fifth transistor having a main current conduction path, said main conduction path of said fifth transistor and said second current path of said second rectifier device being coupled to said third electrode of said fourth transistor and being similarly poled for current conduction with respect to said third electrode of said fourth transistor, a second output load circuit coupled to said main conduction path of said fifth transistor, and means for direct current coupling said gain controlling means to said second rectifier device for proportioning the relative flow of current of said fourth transistor through said second current path and said main conduction path of said fifth transistor and thereby proportioning the flow of current through said second rectifier device and said fifth transistor, whereby the signal gain associated with said fifth transistor and said second output load circuit is varied.
Claim 6
Dependent Claim 42 words
A controllable gain signal amplifier according to claim 4 wherein: said source of direct voltage and said resistance are selected to provide a maximum direct current related to said quiescent operating current such that said second and fifth transistors are cut off.
Claim 7
Dependent Claim 48 words
A controllable gain signal amplifier according to claim 5 wherein: said main conduction path of each of said transistors corresponds to an emitter-collector path, whereby said first and second transistors form a first cascode signal amplifier and said fourth and fifth transistors form a second cascode signal amplifier.
Claim 8
Dependent Claim 45 words
A controllable gain signal amplifier according to claim 6 and further comprising: biasing means coupled in common to said second and fifth transistors selected for providing substantially zero conduction in said second and fifth transistors when said variable voltage divider is adjusted for minimum gain.
Claim 9
Dependent Claim 38 words
A controllable gain signal amplifier according to claim 7 wherein: said biasing means is selected to provide substantially one-half said quiescent operating current through said second and fifth transistors when said voltage divider is adjusted for maximum gain.

References Cited (Backward Citations)

US3772463A Cited
US3740462A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-07-20 1980-01-19 1980-07-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-07-20 1984-01-19 1984-07-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-07-20 1988-01-19 1988-07-20 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag