US3970947A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Multi-stage differential amplifier circuit with means for compensating the temperature drift of a constant current source transistor
Assignee: Toshiba Corp
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Filing: 1975-05-21
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Granted: 1976-07-20
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Expires: 1995-05-21
Abstract
Abstract A multi-stage differential amplifier circuit comprises a preceding stage differential amplifier and a succeeding stage differential amplifier which are direct-coupled in unbalanced configuration. A variation in the DC level at an output of the amplifier circuit due to the temperature drift of a constant current source transistor in the preceding stage differential amplifier is compensated by a bias circuit connected to the base of one of differential transistors in the succeeding stage differential amplifier. The compensation bias circuit includes a current source transistor the base of which is connected, together with the base of the current source transistor in the preceding stage differential amplifier, to a common drive voltage source.
Inventors
- 👤 Itsuzo Sato
- 👤 Kikuo Saito
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 09:31
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/30; H03F1/302; H03F3/00; H03F3/45; H03F3/45071; H03F3/45076; H03F3/4508; H03F3/45085; H03F2203/00; H03F2203/45; H03F2203/45466; H03F2203/45471; H03F2203/45561; H03F2203/45652; H03F2203/45701
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
147 words
A multi stage differential amplifier circuit comprising: a first differential amplifier means including an output, first and second transistor means connected in a common emitter configuration, and a first current source transistor means coupled to the emitters of said first and second transistor means and having a base coupled to a drive voltage source; and a second differential amplifier means including an input coupled with the output of said first differential amplifier means, an output, third and fourth transistor means connected in a common emitter configuration, a base of said third transistor means being coupled with the input of said second differential amplifier means, and a bias circuit means operative to apply a bias voltage to a base of said fourth transistor means and including a second current source transistor means a base of which is coupled with the base of said first current source transistor means.
Claim 2
Dependent Claim
147 words
A multi stage differential amplifier circuit comprising: a first differential amplifier means including an output, first and second transistor means connected in a common emitter configuration, and a first current source transistor means coupled to the emitters of said first and second transistor means and having a base coupled to a drive voltage source; and a second differential amplifier means including an input coupled with the output of said first differential amplifier means, an output, third and fourth transistor means connected in a common emitter configuration, a base of said third transistor means being coupled with the input of said second differential amplifier means, and a bias circuit means operative to apply a bias voltage to a base of said fourth transistor means and including a second current source transistor means a base of which is coupled with the base of said first current source transistor means.
Claim 3
Dependent Claim
55 words
A differential amplifier circuit according to claim 1 wherein said bias circuit means comprises a load resistive impedance means coupled to the collector of said second current source transistor means, the junction of said load resistive impedance means and said second current source transistor means being coupled to the base of said fourth transistor means.
Claim 4
Dependent Claim
58 words
A differential amplifier circuit according to claim 1 further comprising a further current source transistor means coupled to the emitters of said first and second transistor means in parallel relation with said first current source transistor means, a base of said further current source transistor means being coupled to the base of said first current source transistor means.
Claim 5
Dependent Claim
119 words
A differential amplifier circuit according to claim 1 further comprising a third current source transistor means coupled with the emitters of said third and fourth transistor means, a base of said third current source transistor means being coupled to a driving voltage source; and a third differential amplifier means including fifth and sixth transistor means connected in a common emitter configuration, a base of said fifth transistor means being coupled with the output of said second differential amplifier means; and a bias circuit means operative to apply a bias voltage to the base of said sixth transistor means and including a fourth current source transistor having a base coupled with the base of said third current source transistor means.
Claim 6
Dependent Claim
58 words
A differential amplifier circuit according to claim 4 further comprising a further current source transistor means coupled to the emitters of said third and fourth transistor means in parallel relation to said third current source transistor means, a base of said further current source transistor means being coupled with the base of said third current source transistor means.
Claim 7
Dependent Claim
53 words
A differential amplifier circuit according to claim 1 wherein said second differential amplifier means comprises a third current source transistor means coupled to the emitters of said third and fourth transistor means, a base of said third current source transistor means being coupled with the base of said first current source transistor means.
Claim 8
Dependent Claim
84 words
A differential amplifier circuit according to claim 6 further comprising a third differential amplifier means including fifth and sixth transistor means connected in a common emitter configuration, a base of said fifth transistor means being coupled with the output of said second differential amplifier means; and circuit means operative to apply a bias voltage to a base of said sixth transistor means and including a fourth current source transistor means having a base coupled with the base of said third current source transistor means.
Claim 9
Dependent Claim
113 words
A multi-stage differential amplifier circuit comprising: a first differential amplifier means having an output, and a current source transistor means which causes a DC voltage variation at the output with temperature variation; a second differential amplifier means including first and second transistor means each having a base, collector and emitter and connected in differential configuration and means connected with the base of said first transistor means and operative to produce a DC voltage variation with temperature variation which is substantially the same as that at the output of said first differential amplifier means; and means for direct-coupling the output of said first differential amplifier means with the base of said second transistor means.
Claim 10
Dependent Claim
113 words
A multi-stage differential amplifier circuit comprising: a first differential amplifier means having an output, and a current source transistor means which causes a DC voltage variation at the output with temperature variation; a second differential amplifier means including first and second transistor means each having a base, collector and emitter and connected in differential configuration and means connected with the base of said first transistor means and operative to produce a DC voltage variation with temperature variation which is substantially the same as that at the output of said first differential amplifier means; and means for direct-coupling the output of said first differential amplifier means with the base of said second transistor means.
References Cited (Backward Citations)
US3600607A
Cited
US3531733A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-07-20 | 1980-01-19 | 1980-07-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-07-20 | 1984-01-19 | 1984-07-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-07-20 | 1988-01-19 | 1988-07-20 | $7700.00 | Window Closed / Lapsed |