Method and apparatus for the detection of short circuits

Claim 3

A method as claimed in claim 1, in which the replica signal is obtained through time integration of a signal corresponding to the time derivative of the monitored current, integration is commenced from a value independent of the monitored current and is initiated by the occurrence of the short-circuit probability criterion.

Claim 4

A method as claimed in claim 2, in which the time integration of the signal corresponding to the time derivative of the monitored current commences from an initial value zero of the integration.

Claim 5

A method as claimed in claim 2 comprising: generating a measuring signal corresponding to the time derivative of the monitored current, comparing the measuring signal with at least one limit value, determining the time for which the measuring signal exceeds a limit value, comparing the determined time with a preset reference interval, indicating a short circuit when the time for which the measuring signal exceeds the limit value also exceeds the time interval, checking the measuring signal for the occurrence of a decrease following an initial rise and for the occurrence of a secondary rise, and rendering ineffective with a blocking signal the indication of a short circuit caused when the time for which the measuring signal exceeds the limit value also exceeds the reference interval if the measuring signal undergoes a secondary rise and there is no indication of a short circuit because the replica signal has exceeded a limit value.

Claim 6

A method as claimed in claim 4, in which a sequential signal derived from the measuring signal is generated which follows the measuring signal when the latter first rises and then falls to a first minimum, and is held at this minimum, and the blocking signal is generated according to whether a preset difference between measuring signal and sequential signal is attained when the measuring signal rises again after the first minimum.

Claim 7

A method as claimed in claim 4, in which the sequential signal is held at the first maximum and when the difference between measuring signal and sequential signal is reached together with detection of the first rise of the measuring signal, the sequential signal is released in order to follow the measuring signal until the first minumum.

Claim 8

A method as claimed in claim 1, in which the replica signal used to obtain indication of a short circuit is compared with a limit value which is dependent in the same sense on the rate of rise of the monitored current following the occurrence of the short-circuit probability criterion.

Claim 9

A method as claimed in claim 7, in which a limit-value signal rising in steps with respect to time is generated as a function of a stepped ascent of the monitored current with the height of the steps of the limit-value signal being dependent in the same sense on the maximum rates of rise of the monitored current following the occurrence of the short-circuit probability criterion.

Claim 10

A method as claimed in claim 1 comprising: generating a measuring signal corresponding to the time derivative of the monitored current, comparing the measuring signal with at least one limit value, determining the time for which the measuring signal exceeds a limit value, comparing the determined time with a preset reference interval, indicating a short circuit when the time for which the measuring signal exceeds the limit value also exceeds the time interval, checking the measuring signal for the occurrence of a decrease following an initial rise and for the occurrence of a secondary rise, and rendering ineffective with a blocking signal the indication of a short circuit caused when the time for which the measuring signal exceeds the limit value also exceeds the reference interval if the measuring signal undergoes a secondary rise and there is no indication of a short circuit because the replica signal has exceeded a limit value.

Claim 11

A method as claimed in claim 9, in which a sequential signal derived from the measuring signal is generated which follows the measuring signal when the latter first rises and then falls to a first minimum, and is held at this minimum, and the blocking signal is generated according to whether a preset difference between measuring signal and sequential signal is attained when the measuring signal rises again after the first minimum.

Claim 12

A method as claimed in claim 9, in which the sequential signal is held at the first maximum and when the difference between measuring signal and sequential signal is reached together with detection of the first rise of the measuring signal, the sequential signal is released in order to follow the measuring signal until the first minimum.

Claim 13

A method as claimed in claim 1 in which the short-circuit indication caused when the replica signal exceeds a limit value, together with a further short-circuit indication caused when the length of time for which a signal corresponding to the time derivative of the monitored current exceeds a limit value also exceeds a preset reference interval, are coupled by way of OR gating means to form a resultant over-current signal.

Claim 14

A method as claimed in claim 1, in which the short-circuit indication caused when the replica signal exceeds a limit value is coupled by way of AND gating means with a negated current time derivative re-increase or secondary-rise detection signal to form a valid overcurrent signal.

Claim 15

A method as claimed in claim 1, in which the short-circuit indication caused when the replica signal exceeds a limit value is coupled by way of OR gating means with a further shot-circuit indication caused when a signal corresponding to the time derivative of the monitored current exceeds a limit value to form a resultant over-current signal.

Claim 16

A monitoring circuit for the detection of short circuits in electrical installations, in particular on railway contact wires, comprising: a measuring-signal emitter with a current-differentiating element, connected to a current path of the installation to be monitored, a limit-value switch which changes to the on-state when the measuring signal exceeds a limit value, an integrator connected to the output of the measuring-signal emitter and having a switch which can be switched by the output of the limit-value switch between an off-state which sets the integrator to a preset initial value, and an on-state which starts the integration, according to whether the measuring signal has exceeded a limit value, a limit-value emitter having its input actively connected to the output of the measuring-signal emitter, and supplying at its output at least one limit value dependent on a maximum value of the measuring signal and in the same sense, a comparator stage connected to the output of the integrator and to the output of the limit-value emitter and providing at its output an indication of a short circuit when the time integral of the measuring signal exceeds the limit value.

Claim 17

A monitoring circuit for the detection of short circuits in electrical installations, in particular on railway contact wires, comprising: a measuring-signal emitter with a current-differentiating element, connected to a current path of the installation to be monitored, a limit-value switch which changes to the on-state when the measuring signal exceeds a limit value, an integrator connected to the output of the measuring-signal emitter and having a switch which can be switched by the output of the limit-value switch between an off-state which sets the integrator to a preset initial value, and an on-state which starts the integration, according to whether the measuring signal has exceeded a limit value, a limit-value emitter having its input actively connected to the output of the measuring-signal emitter, and supplying at its output at least one limit value dependent on a maximum value of the measuring signal and in the same sense, a comparator stage connected to the output of the integrator and to the output of the limit-value emitter and providing at its output an indication of a short circuit when the time integral of the measuring signal exceeds the limit value.

Claim 18

Circuitry as claimed in claim 15, in which the limit-value emitter incorporates at least one storage element for the maximum value of the measuring signal.

Claim 19

Circuitry as claimed in claim 16, in which the limit-value emitter incorporates a signal-sequence circuit which receives the measuring signal and includes two selective storage devices for following the ascent and descent of the measuring signal, and the output of the selective storage device for following the ascent forms the output of the limit-value emitter.

Claim 20

Circuitry as claimed in claim 17, in which the selective storage devices are each provided with a switch controllable from the output of the limit-value switch, such that these switches, when in their switching state before the measuring signal exceeds a limit value, hold the outputs of the storage devices at a preset initial value, and when in their switching state after the measuring signal has exceeded a limit value, switch the outputs of the storage devices via a summing element to the signal-sequence circuit.

Claim 21

Circuitry as claimed in claim 18, in which the storage device responsible for following the ascent of the measuring signal is provided with an initial value relating to the switching state before the measuring signal exceeds a limit value with the initial value corresponding to the limit value which causes the storage device to be connected to the signal-sequence circuit.

Claim 22

Circuitry as claimed in claim 15, in which the output of the comparator stage is connected disjunctively to the output of a limit-value switch monitoring the rate of rise of the current as to whether it exceeds a preset limit value, to form an output indicating an overcurrent.

Claim 23

Circuitry as claimed in claim 15, in which the output of the comparator stage is connected disjunctively to the output of an overtime switch which monitors a signal corresponding to the time derivative of the monitored current as to whether the time for which this signal exceeds a limit value also exceeds a reference interval, to form an output indicating an overcurrent.

Claim 24

Circuitry as claimed in claim 15, in which the output of the comparator stage is connected conjunctively to a negated output of a secondary-rise detector monitoring the behavior of the signal corresponding to the time derivative of the monirored current, to form an output indicating an overcurrent.