Method and apparatus for recovering data and clock information in a self-clocking data stream

Claim 3

The method of claim 1, wherein the step of producing a clock pulse comprises: producing a pulse for each positive-going voltage level transition of each of said second pulses.

Claim 6

The method of claim 3, wherein the step of producing a clock pulse comprises: producing a pulse for each positive-going voltage level transition of each of said second pulses.

Claim 7

The method of claim 3, wherein the step of counting comprises: counting the number of negative-going voltage level transitions occurring in all of said first pulses produced between successive clock pulses.

Claim 8

A data transmission system using self-clocking bi-phase coded bit streams, said bit streams having a predetermined bit period and two voltage levels with negative-going and positive-going voltage level transitions occurring in the stream to indicate clock information and data information, one such voltage transition occurring at the beginning of each bit period, apparatus for recovering said information, including: a. first pulse producing means connected to receive said bit stream responsive to each positive-going and each negative-going transition in the voltage level of said bit stream for producing pulses in response thereto; b. a second pulse producing means connected to said first pulse producing means for receiving pulses therefrom, said second pulse producing means responsive, when not in the process of producing a pulse, to positive-going transitions in the voltage level of said pulses for producing timing pulses, each having a pulse width greater than one-half of the bit period of the data stream; and c. a clock pulse generator connected to said second pulse producing means responsive to positive-going or negative-going voltage level transitions in said timing pulse for generating a clock pulse.

Claim 9

A data transmission system using self-clocking bi-phase coded bit streams, said bit streams having a predetermined bit period and two voltage levels with negative-going and positive-going voltage level transitions occurring in the stream to indicate clock information and data information, one such voltage transition occurring at the beginning of each bit period, apparatus for recovering said information, including: a. first pulse producing means connected to receive said bit stream responsive to each positive-going and each negative-going transition in the voltage level of said bit stream for producing pulses in response thereto; b. a second pulse producing means connected to said first pulse producing means for receiving pulses therefrom, said second pulse producing means responsive, when not in the process of producing a pulse, to positive-going transitions in the voltage level of said pulses for producing timing pulses, each having a pulse width greater than one-half of the bit period of the data stream; and c. a clock pulse generator connected to said second pulse producing means responsive to positive-going or negative-going voltage level transitions in said timing pulse for generating a clock pulse.

Claim 10

The combination set forth in claim 6, wherein said first pulse producing means is a monostable multivibrator.

Claim 11

The combination set forth in claim 6, wherein said first pulse producing means is a monostable multivibrator, and said second pulse producing means is a second monostable multivibrator connected to said first monostable multivibrator.

Claim 12

The combination set forth in claim 6, wherein said first pulse producing means is a monostable multivibrator, said second pulse producing means is a second monostable multivibrator connected to said first monostable multivibrator and said clock pulse generator is a third monostable multivibrator.

Claim 13

In a data transmission system using self-clocking bi-phase coded bit streams, said bit streams having a predetermined bit period and two voltage levels with negative-going and positive-going voltage level transitions occurring in the stream to indicate clock information and data information, one such voltage level transition occurring at the beginning of each bit period, apparatus for recovering said information, including: a. first pulse producing means connected to receive said bit stream responsive to each positive-going and each negative-going transition in the voltage level of said bit stream for producing pulses in response thereto; b. a second pulse producing means connected to said first pulse producing means for receiving pulses therefrom, said second pulse producing means responsive, when not in the process of producing a pulse, to positive-going transitions in the voltage level of said pulses for producing timing pulses, each having a pulse width greater than one-half of the bit period of the data stream; c. a clock pulse generator connected to said second pulse producing means responsive to positive-going or negative-going voltage level transitions in said timing pulse for generating a clock pulse; and d. means connected to said first pulse producing means and to said clock pulse generator for counting the number of positive-going or negative-going voltage transitions from said first pulse

Claim 14

In a data transmission system using self-clocking bi-phase coded bit streams, said bit streams having a predetermined bit period and two voltage levels with negative-going and positive-going voltage level transitions occurring in the stream to indicate clock information and data information, one such voltage level transition occurring at the beginning of each bit period, apparatus for recovering said information, including: a. first pulse producing means connected to receive said bit stream responsive to each positive-going and each negative-going transition in the voltage level of said bit stream for producing pulses in response thereto; b. a second pulse producing means connected to said first pulse producing means for receiving pulses therefrom, said second pulse producing means responsive, when not in the process of producing a pulse, to positive-going transitions in the voltage level of said pulses for producing timing pulses, each having a pulse width greater than one-half of the bit period of the data stream; c. a clock pulse generator connected to said second pulse producing means responsive to positive-going or negative-going voltage level transitions in said timing pulse for generating a clock pulse; and d. means connected to said first pulse producing means and to said clock pulse generator for counting the number of positive-going or negative-going voltage transitions from said first pulse

Claim 15

The combination set forth in claim 10, wherein said first pulse producing means is a monostable multivibrator.

Claim 16

The combination set forth in claim 11, wherein said second pulse producing means is a monostable multivibrator.

Claim 17

The combination set forth in claim 12, wherein said clock pulse generator is a monostable multivibrator.

Claim 18

In a data transmission system using self-clocking bi-phase coded bit streams, said bit streams having a predetermined bit period and two voltage levels with negative-going and positive-going voltage level transitions occurring in the stream to indicate clock information and data information, one such voltage level transition occurring at the beginning of each bit period, apparatus for recovering said information, including: a. first pulse producing means connected to receive said bit stream responsive to each positive-going and each negative-going transition in the voltage level of said bit stream for producing pulses in response thereto; b. a second pulse producing means connected to said first pulse producing means for receiving pulses therefrom, said second pulse producing means responsive, when not in the process of producing a pulse, to positive-going transitions in the voltage level of said pulses for producing timing pulses, each having a pulse width greater than one-half of the bit period of the data stream; c. a clock pulse generator connected to said second pulse producing means responsive to positive-going or negative-going voltage level transitions in said timing pulse for generating a clock pulse; and d. means connected to said first pulse producing means and to said clock pulse generator responsive to the receipt of two successive negative-going or positive-going voltage level transitions from said first pulse producing means after the receipt of a clock pulse and before the receipt of a second clock pulse from said clock pulse generator for producing a first output voltage level, and responsive to the receipt of only one negative-going or positive-going voltage level transition from said first pulse producing means after the receipt of a clock pulse and before the receipt of a second clock pulse from said clock pulse generator for producing a second output voltage level.

Claim 19

In a data transmission system using self-clocking bi-phase coded bit streams, said bit streams having a predetermined bit period and two voltage levels with negative-going and positive-going voltage level transitions occurring in the stream to indicate clock information and data information, one such voltage level transition occurring at the beginning of each bit period, apparatus for recovering said information, including: a. first pulse producing means connected to receive said bit stream responsive to each positive-going and each negative-going transition in the voltage level of said bit stream for producing pulses in response thereto; b. a second pulse producing means connected to said first pulse producing means for receiving pulses therefrom, said second pulse producing means responsive, when not in the process of producing a pulse, to positive-going transitions in the voltage level of said pulses for producing timing pulses, each having a pulse width greater than one-half of the bit period of the data stream; c. a clock pulse generator connected to said second pulse producing means responsive to positive-going or negative-going voltage level transitions in said timing pulse for generating a clock pulse; and d. means connected to said first pulse producing means and to said clock pulse generator responsive to the receipt of two successive negative-going or positive-going voltage level transitions from said first pulse producing means after the receipt of a clock pulse and before the receipt of a second clock pulse from said clock pulse generator for producing a first output voltage level, and responsive to the receipt of only one negative-going or positive-going voltage level transition from said first pulse producing means after the receipt of a clock pulse and before the receipt of a second clock pulse from said clock pulse generator for producing a second output voltage level.

Claim 20

The combination set forth in claim 14, wherein said first pulse producing means is a monostable multivibrator.

Claim 21

The combination set forth in claim 15, wherein said second pulse producing means is a monostable multivibrator.

Claim 22

The combination set forth in claim 16, wherein said clock pulse generator is a monostable multivibrator.

Claim 23

In a data transmission system using self-clocking bi-phase coded bit streams, said bit streams having a predetermined bit period and two voltage levels with negative-going and positive-going voltage level transitions occurring in the stream to indicate clock information and data information, one such voltage level transition occurring at the beginning of each bit period, apparatus for recovering said information, including: a. a first one-shot connected to receive said data stream responsive to each positive-going transition in the voltage level of said data stream for producing pulses in response thereto; b. a second one-shot connected to receive said data stream responsive to each negative-going transition in the voltage level of said data stream for producing pulses in response thereto; c. a third one-shot, having an output terminal that is at a high voltage level or a low voltage level, connected to said first and second one-shots for receiving pulses therefrom, said third one-shot responsive to, when the output terminal thereof is at said low voltage level, to positive-going transitions in the voltage level of said pulses for producing timing pulses at the output terminal thereof, each timing pulse having said high voltage level and having a pulse width greater than one-half of the bit period of said data stream; and

Claim 24

In a data transmission system using self-clocking bi-phase coded bit streams, said bit streams having a predetermined bit period and two voltage levels with negative-going and positive-going voltage level transitions occurring in the stream to indicate clock information and data information, one such voltage level transition occurring at the beginning of each bit period, apparatus for recovering said information, including: a. a first one-shot connected to receive said data stream responsive to each positive-going transition in the voltage level of said data stream for producing pulses in response thereto; b. a second one-shot connected to receive said data stream responsive to each negative-going transition in the voltage level of said data stream for producing pulses in response thereto; c. a third one-shot, having an output terminal that is at a high voltage level or a low voltage level, connected to said first and second one-shots for receiving pulses therefrom, said third one-shot responsive to, when the output terminal thereof is at said low voltage level, to positive-going transitions in the voltage level of said pulses for producing timing pulses at the output terminal thereof, each timing pulse having said high voltage level and having a pulse width greater than one-half of the bit period of said data stream; and

Claim 25

The combination set forth in claim 18, wherein said clock pulse generator is a one-shot.

Claim 26

In a data transmission system using self-clocking bi-phase coded bit streams, said bit streams having a predetermined bit period and two voltage levels with negative-going and positive-going voltage level transitions occurring in the stream to indicate clock information and data information, one such voltage level transition occurring at the beginning of each bit period, apparatus for recovering said information, including: a. a first one-shot connected to receive said data stream responsive to each positive-going transition in the voltage level of said data stream for producing pulses in response thereto; b. a second one-shot connected to receive said data stream responsive to each negative-going transition in the voltage level of said data stream for producing pulses in response thereto; c. a third one-shot, having an output terminal that is at a high voltage level or a low voltage level, connected to said first and second one-shots for receiving pulses therefrom, said third one-shot responsive to, when the output terminal thereof is at said low voltage level, to positive-going transitions in the voltage level of said pulses for producing timing pulses at the output terminal thereof, each timing pulse having said high voltage level and having a pulse width greater than one-half of the bit period of said data stream; d. a clock pulse generator connected to the output terminal of said third one-shot responsive to the positive-going or negative-going voltage level transitions in said timing pulse for generating a clock pulse; e. means comprising an OR-gate connected to said first and second one-shots for receiving pulses therefrom; and f. means connected to said OR-gate for receiving OR'ed pulses from said first and second one-shots and connected to said clock pulse generator for counting the number of positive-going or negative-going voltage level transitions in the pulses received from said OR-gate occurring between successive clock pulses and for producing a first output voltage level when said number is one and for producing a second output voltage level when said number is two.

Claim 27

In a data transmission system using self-clocking bi-phase coded bit streams, said bit streams having a predetermined bit period and two voltage levels with negative-going and positive-going voltage level transitions occurring in the stream to indicate clock information and data information, one such voltage level transition occurring at the beginning of each bit period, apparatus for recovering said information, including: a. a first one-shot connected to receive said data stream responsive to each positive-going transition in the voltage level of said data stream for producing pulses in response thereto; b. a second one-shot connected to receive said data stream responsive to each negative-going transition in the voltage level of said data stream for producing pulses in response thereto; c. a third one-shot, having an output terminal that is at a high voltage level or a low voltage level, connected to said first and second one-shots for receiving pulses therefrom, said third one-shot responsive to, when the output terminal thereof is at said low voltage level, to positive-going transitions in the voltage level of said pulses for producing timing pulses at the output terminal thereof, each timing pulse having said high voltage level and having a pulse width greater than one-half of the bit period of said data stream; d. a clock pulse generator connected to the output terminal of said third one-shot responsive to the positive-going or negative-going voltage level transitions in said timing pulse for generating a clock pulse; e. means comprising an OR-gate connected to said first and second one-shots for receiving pulses therefrom; and f. means connected to said OR-gate for receiving OR'ed pulses from said first and second one-shots and connected to said clock pulse generator for counting the number of positive-going or negative-going voltage level transitions in the pulses received from said OR-gate occurring between successive clock pulses and for producing a first output voltage level when said number is one and for producing a second output voltage level when said number is two.

Claim 28

The combination set forth in claim 20, wherein said means for counting comprises a first and a second flip-flop, the first of which is connected to receive pulses from said OR-gate and the second of which is connected to the first flip-flop and changes state when the first has received its second pulse from said OR-gate.