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US3965371A Expired / Lapsed US ⏱️ 0.0 years remaining

Temperature compensated video signal processing circuit with a video signal clipping device

Assignee: Toshiba Corp
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Filing: 1975-05-21
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Granted: 1976-06-22
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Expires: 1995-05-21
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Abstract

Abstract A temperature dependent variation of the voltage drop across a clipping pn junction device which causes the clipping voltage level of a DC restored video signal to vary is compensated by the base-to-emitter voltage variation of an emitter follower transistor having substantially the same temperature characteristic as the clipping pn junction device. A variation in the DC level of the DC restored video signal resulting from the base-to-emitter voltage variation of the emitter follower transistor is compensated by a feed back type differential amplifier whose output is fed back to one input thereof through an emitter follower transistor and a pn junction device.

Inventors

  • 👤 Itsuzo Sato
  • 👤 Kikuo Saito

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 18:51
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/14; H04N5/16; H03; H03K; H03K5/00; H03K5/01

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 208 words
A video signal processing circuit comprising: a first transistor differential amplifier having an input and output, the input of said first transistor differential amplifier being connected to receive a DC restored video signal; a clipping pn junction device coupled to the output of said first transistor differential amplifier; a first emitter follower transistor whose base is connected to a bias voltage source to apply a predetermined bias voltage to said clipping pn junction device by an emitter output of said first emitter follower transistor; and a second transistor differential amplifier including first and second transistors each having an emitter collector and base and connected in common emitter configuration, the base of said first transistor being coupled to the output of said clipping pn junction, a load resistor coupled to the collector of said second transistor, a second emitter follower transistor whose base is coupled to the collector of said second transistor, and a second pn junction device coupled between the emitter of said second emitter follower transistor and the base of said second transistor, the polarity relation of said second pn junction device to the base of said second transistor being the same as that of said clipping pn junction device to the base of said first transistor.
Claim 2
Dependent Claim 208 words
A video signal processing circuit comprising: a first transistor differential amplifier having an input and output, the input of said first transistor differential amplifier being connected to receive a DC restored video signal; a clipping pn junction device coupled to the output of said first transistor differential amplifier; a first emitter follower transistor whose base is connected to a bias voltage source to apply a predetermined bias voltage to said clipping pn junction device by an emitter output of said first emitter follower transistor; and a second transistor differential amplifier including first and second transistors each having an emitter collector and base and connected in common emitter configuration, the base of said first transistor being coupled to the output of said clipping pn junction, a load resistor coupled to the collector of said second transistor, a second emitter follower transistor whose base is coupled to the collector of said second transistor, and a second pn junction device coupled between the emitter of said second emitter follower transistor and the base of said second transistor, the polarity relation of said second pn junction device to the base of said second transistor being the same as that of said clipping pn junction device to the base of said first transistor.
Claim 3
Dependent Claim 29 words
A video signal processing circuit according to claim 1 in which said clipping pn junction device is a diode-connected transistor whose collector and base are connected with each other.
Claim 4
Dependent Claim 46 words
A video signal processing circuit according to claim 1 in which said second pn junction device comprises an emitter follower transistor whose base is coupled to the emitter of said second emitter follower transistor and whose emitter is coupled to the base of said second transistor.
Claim 5
Dependent Claim 71 words
A video signal processing circuit according to claim 1 in which said clipping pn junction device is a diode-connected transistor whose collector and base are connected with each other, said diode-connected transistor having the collector and base coupled to the output of said first differential amplifier and an emitter coupled to the base of said first transistor of said second differential amplifier, and the emitter of said first emitter follower transistor.

References Cited (Backward Citations)

US3760196A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-06-22 1979-12-22 1980-06-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-06-22 1983-12-22 1984-06-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-06-22 1987-12-22 1988-06-22 $7700.00 Window Closed / Lapsed

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