Tone frequency detecting circuit

Claim 2

An improved circuit for detecting the frequency of an audio tone identification signal transmitted in a radio system, said improved circuit comprising: a. circuit input means adapted to be connected to said radio system for receiving said identification signal and producing a tone marker pulse in response to a selected time point in each cycle of said identification signal; b. a generator for producing N pulses during the time interval between each tone marker pulse and the next successive tone marker pulse; c. a coincidence circuit connected to said pulse generator and to said circuit input means for producing one of N coincidence signals in response to the simultaneous presence of one of said N generator pulses and a tone marker pulse respectively; d. vector generator means connected to said coincidence circuit for producing a predetermined vector signal in response to each of said N coincidence signals respectively; e. means connected to said vector generator means for producing a signal representative of a limited sum of said produced vector signals; f. and threshold means connected to said signal producing means for producing a circuit output signal in response to said representative signal exceeding a predetermined magnitude.

Claim 3

The improved circuit of claim 1 wherein said selected time point in each cycle of said identification signal is at every other zero crossing.

Claim 4

The improved circuit of claim 1 wherein said vector generator means produce X and Y components of said vector signals, wherein said signal producing means produce limited sums of said X and Y components, wherein said signal producing means further include a resultant adding circuit for said limited sums of said X and Y components, and wherein said threshold means are connected to said resultant adding circuit.

Claim 5

An improved circuit for detecting an identification signal of predetermined frequency comprising: a. first means for repetitively producing a sequency of N numbers at a sequence repetition frequency substantially equal to said predetermined frequency of said identification signal; b. second means responsive to said identification signal for producing signals indicative of the frequency thereof; c. a vector generator having a first input connected to said first means for said numbers and having a second input connected to said second means for said frequency indicative signals, said vector generator having at least one ouput for producing a vector signal in response to the simultaneous presence of any of said N numbers at said first input and any frequency indicative signal at said second input; d. each vector signal produced by said vector generator having a characteristic corresponding to the number present at said first input during its simultaneous presence with a frequency indicative signal at said second input; e. third means connected to said vector generator for summing the vector signals produced thereby and producing a resultant signal therefrom; f. and fourth means connected to said third means for producing a detection signal in response to said resultant signal exceeding a predetermined magnitude.

Claim 6

An improved circuit for detecting an identification signal of predetermined frequency comprising: a. first means for repetitively producing a sequency of N numbers at a sequence repetition frequency substantially equal to said predetermined frequency of said identification signal; b. second means responsive to said identification signal for producing signals indicative of the frequency thereof; c. a vector generator having a first input connected to said first means for said numbers and having a second input connected to said second means for said frequency indicative signals, said vector generator having at least one ouput for producing a vector signal in response to the simultaneous presence of any of said N numbers at said first input and any frequency indicative signal at said second input; d. each vector signal produced by said vector generator having a characteristic corresponding to the number present at said first input during its simultaneous presence with a frequency indicative signal at said second input; e. third means connected to said vector generator for summing the vector signals produced thereby and producing a resultant signal therefrom; f. and fourth means connected to said third means for producing a detection signal in response to said resultant signal exceeding a predetermined magnitude.

Claim 7

The improved circuit of claim 4 wherein each of said vector signals is characterized by a distinct angular position spaced 360° /N from adjacent vector signals.

Claim 8

The improved circuit of claim 4 wherein said third means further comprise means for reducing the magnitude of said vector signals a selected amount in response to each of said frequency indicative signals.

Claim 9

The improved circuit of claim 4 wherein said second means includes means for converting alternate half cycles of said identification signal into first and second frequency indicative signals respectively, wherein said vector generator can produce N different vector signals, wherein said vector generator produces a first half of said N vector signals in response to a first half of said numbers and said first frequency indicative signal, wherein said vector generator produces a second half of said N vector signals in response to said first half of said N numbers and said second frequency indicative signal, wherein said vector generator produces said second half of said N vector signals in response to a second half of said N numbers and said first frequency indicative signal, and wherein said vector generator produces said first half of said N vector signals in response to said second half of said N numbers and said second frequency indicative signal.

Claim 10

An improved circuit for detecting an identification signal of predetermined frequency comprising: a. first means for repetitively producing a sequency of N binary numbers at a sequence repetition frequency substantially equal to said predetermined frequency of said identification signal to be detected; b. second means responsive to said identification signal for producing signals indicative of the frequency thereof; c. a vector generator for producing a vector signal corresponding to each of said N binary numbers, said generator including: a first input connected to said first means, a second input connected to said second means, a first readout circuit for producing a first component of said vector signal in response to the simultaneous presence of any of said N binary numbers at said first input and any frequency indicative signal at said second input, and a second readout circuit for producing a second component of said vector signal in response to the simultaneous presence of any of said N binary numbers at said first input and any frequency indicative signal at said second input; d. each first and second component of each vector signal produced by said vector generator having a characteristic corresponding to the binary number present at said first input during its simultaneous presence with a frequency indicative signal at said second input; e. third means connected to said first and second readout circuits for respectively adding said first components and said second components produced thereby, and vectorially summing said added first components and said added second components; f. and fourth means connected to said third means for producing a detection signal in response to vectorial sums exceeding a predetermined magnitude.

Claim 11

An improved circuit for detecting an identification signal of predetermined frequency comprising: a. first means for repetitively producing a sequency of N binary numbers at a sequence repetition frequency substantially equal to said predetermined frequency of said identification signal to be detected; b. second means responsive to said identification signal for producing signals indicative of the frequency thereof; c. a vector generator for producing a vector signal corresponding to each of said N binary numbers, said generator including: a first input connected to said first means, a second input connected to said second means, a first readout circuit for producing a first component of said vector signal in response to the simultaneous presence of any of said N binary numbers at said first input and any frequency indicative signal at said second input, and a second readout circuit for producing a second component of said vector signal in response to the simultaneous presence of any of said N binary numbers at said first input and any frequency indicative signal at said second input; d. each first and second component of each vector signal produced by said vector generator having a characteristic corresponding to the binary number present at said first input during its simultaneous presence with a frequency indicative signal at said second input; e. third means connected to said first and second readout circuits for respectively adding said first components and said second components produced thereby, and vectorially summing said added first components and said added second components; f. and fourth means connected to said third means for producing a detection signal in response to vectorial sums exceeding a predetermined magnitude.

Claim 12

The improved circuit of claim 8 wherein each of said vector signals is characterized by a distinct angular position spaced 360°/N from adjacent vector signals.

Claim 13

The improved circuit of claim 8 wherein said third means further comprise means for reducing the magnitude of said added components a selected amount in response to each of said frequency indicative signals.

Claim 14

The improved circuit of claim 8 wherein said second means includes means for converting alternate half cycles of said identification signal into first and second frequency indicative signals respectively, wherein said vector generator can produce N different vector signals, wherein said vector generator produces a first half of said N vector signals in response to a first half of said N binary numbers and said first frequency indicative signal, wherein said vector generator produces a second half of said N vector signals in response to said first half of said N binary numbers and said second frequency indicative signal, wherein said vector generator produces said second half of said N vector signals in response to a second half of said N binary numbers and said first frequency indicative signal, and wherein said vector generator produces said first half of said N vector signals in response to said second half of said N binary numbers and said second frequency indicative signal.