High inverse gain transistor

Claim 1

In a high inverse gain semiconductor device, a one conductivity type semiconductor substrate having a major surface, a buried region formed in said substrate of relatively high concentration of one conductivity type impurities extending to said major surface, a one conductivity type semiconductor layer formed on said major surface, said layer having a planar surface, an opposite conductivity base region formed in said layer overlying said buried region and extending to said planar surface and being defined by a first PN junction, a one conductivity additional region formed entirely within said opposite conductivity base region and being defined by a second PN junction and extending to said surface to form a base region of a relatively uniform narrow width extending to said planar surface with the areas of the first and second PN junctions overlying said buried regions being substantially of the same size said base region having a portion thereof of greater width of said planar surface to form a contact region for said base region, a insulating layer formed on said planar surface, lead means carried by said insulating layer and extending through said insulating layer and making contact to said contact regions of said base region and said additional region, said layer, base and additional region forming a bilateral transistor capable of substantial forward gain using said additional region as an emitter and said layer as a collector and capable of relatively high inverse gain using said additional region as a collector and said layer as an emitter.