Wideband phase locked loop transmitter system

Claim 2

A phase locked loop comprising: a. a reference oscillator providing an output signal having a fixed predetermined frequency; b. a loop phase detector having a first input connected to receive the output signal of said reference oscillator, a second input and an output; c. an integrating low pass filter including an operational amplifier having a pair of inputs connected to the output of said loop phase detector and an output; d. sweep signal producing means including fixed current sink means connected alternately to each of said inputs of said operational amplifier during unlock conditions of the phase locked loop and disconnected during lock conditions for providing a substantially linear ramp voltage at the output of said low pass filter when said sweep signal producing means is activated; e. a voltage controlled oscillator having a control input for controlling the operating frequency thereof connected to the output of said integrating low pass filter and an output having a signal of a predetermined frequency thereon; f. a mixer having a first input connected to the output of said voltage controlled oscillator, a second input and an output connected to the second input of said loop phase detector; and g. signal providing means connected to the second input of said mixer for supplying a signal thereto having a frequency separated from the frequency of the output signal of said voltage controlled oscillator by the frequency of the output signal of said reference oscillator.

Claim 3

A phase locked loop comprising: a. a reference oscillator providing an output signal having a fixed predetermined frequency; b. a loop phase detector having a first input connected to receive the output of said reference oscillator, a second input and an output; c. an integrating low pass filter having an input connected to the output of said loop phase detector and an output; d. sweep signal producing means connected to said low pass filter for providing a substantially linear ramp voltage at the output of said low pass filter when said sweep signal producing means is activated; e. a voltage controlled oscillator having a control input for controlling the operating frequency thereof connected to the output of said integrating low pass filter and an output having a signal of a predetermined frequency thereon; f. a mixer having a first input connected to the output of said voltage controlled oscillator, a second input and an output connected to the second input of said loop phase detector; g. signal providing means connected to the second input of said mixer for supplying a signal thereto having a frequency separated from the frequency of the output signal of said voltage controlled oscillator by the frequency of the output signal of said reference oscillator; h. a quadrature phase detector including a 90° phase shifter connecting the output signal of said reference oscillator to a first input of said quadrature phase detector, a second input being connected to the output of said mixer and an output; i. a lock detector having an input connected to the output of said quadrature phase detector and an output connected to said sweep signal producing means for activating the sweep signal producing means during unlock conditions of the phase locked loop; j. a gate circuit connected to the output of said voltage controlled oscillator for connecting the signal therefrom to a suitable load when said gate circuit is activated; and k. a ramp generator having an input coupled to receive an indication of a lock condition from said lock detector and an output connected to said gate circuit for causing said ramp generator to supply a ramp output signal to said gate circuit upon an indication of a lock condition in the phase locked loop, which ramp gradually activates said gate circuit.

Claim 4

A phase locked loop comprising: a. a reference oscillator providing an output signal having a fixed predetermined frequency; b. a loop phase detector having a first input connected to receive the output of said reference oscillator, a second input and an output; c. an integrating low pass filter having an input connected to the output of said loop phase detector and an output; d. sweep signal producing means connected to said low pass filter for providing a substantially linear ramp voltage at the output of said low pass filter when said sweep signal producing means is activated; e. a voltage controlled oscillator having a control input for controlling the operating frequency thereof connected to the output of said integrating low pass filter and an output having a signal of a predetermined frequency thereon; f. a mixer having a first input connected to the output of said voltage controlled oscillator, a second input and an output connected to the second input of said loop phase detector; g. signal providing means connected to the second input of said mixer for supplying a signal thereto having a frequency separated from the frequency of the output signal of said voltage controlled oscillator by the frequency of the output signal of said reference oscillator; h. a quadrature phase detector including a 90° phase shifter connecting the output signal of said reference oscillator to a first input of said quadrature phase detector, a second input being connected to the output of said mixer and an output; i. a lock detector having an input connected to the output of said quadrature phase detector and an output connected to said sweep signal producing means for activating the sweep signal producing means during unlock conditions of the phase locked loop; j. a gate circuit connected to the output of said voltage controlled oscillator for connecting the signal therefrom to a suitable load when said gate circuit is activated; and k. a ramp generator having an input coupled to receive an indication of a lock condition from said lock detector and an output connected to said gate circuit for causing said ramp generator to supply a ramp output signal to said gate circuit upon an indication of a lock condition in the phase locked loop, which ramp gradually activates said gate circuit.

Claim 5

A phase locked loop as claimed in claim 2 wherein the suitable load connected to the voltage controlled oscillator by the gate circuit includes power amplifiers having an output coupled to an antenna, said power amplifiers having an activating input coupled to the ramp generator for activating said power amplifiers prior to supplying the ramp output signal to said gate circuit.

Claim 6

A phase locked loop as claimed in claim 2 wherein the integrating low pass filter includes an operational amplifier having a pair of inputs and the sweep signal producing means includes fixed current sink means connected alternately with each of said inputs of said operational amplifier during unlock conditions of tthe phase locked loop and disconnected during lock conditions.

Claim 7

A phase locked loop as claimed in claim 2 wherein the signal providing means includes a multiplying circuit having an input connected to the output of the reference oscillator and an output connected to the mixer.

Claim 8

A phase locked loop as claimed in claim 2 wherein the signal providing means includes a source of signals having a variable frequency output.

Claim 9

A sweep signal producing circuit for a phase locked loop comprising: a. integrating, low pass filter means including an operational amplifier having a pair of inputs and an output; b. fixed current sink means connected to the inputs of said operational amplifier via flip-flop action for reducing input signals applied thereto in a substantially step function; and c. means having an input and associated with said fixed current sink means for activating and deactivating said sink in response to a predetermined signal applied to the input thereof.

Claim 10

A sweep signal producing circuit for a phase locked loop comprising: a. integrating, low pass filter means including an operational amplifier having a pair of inputs and an output; b. fixed current sink means connected to the inputs of said operational amplifier via flip-flop action for reducing input signals applied thereto in a substantially step function; and c. means having an input and associated with said fixed current sink means for activating and deactivating said sink in response to a predetermined signal applied to the input thereof.

Claim 11

A phase locked loop comprising: a. a reference oscillator providing an output signal having a fixed predetermined frequency; b. a loop phase detector having a first input connected to receive the output signal of said reference oscillator, a second input and an output; c. an integrating low pass filter having an input connected to the output of said loop phase detector and an output; d. sweep signal producing means connected to said low pass filter for providing a substantially linear ramp voltage at the output of said low pass filter when said sweep signal producing means is activated; e. a voltage controlled oscillator having a control input for controlling the operating frequency thereof connected to the output of said integrating low pass filter and an output having a signal of a predetermined frequency thereon; f. a mixer having a first input connected to the output of said voltage controlled oscillator, a second input and an output connected to the second input of said loop phase detector; g. signal providing means connected to the second input of said mixer for supplying a signal thereto having a frequency separated from the frequency of the output signal of said voltage controlled oscillator by the frequency of the output signal of said reference oscillator; h. a gate circuit connected to the output of the voltage controlled oscillator for connecting the signal therefrom to a suitable load when said gate circuit is activated; i. a lock detector coupled to the phase lock loop and providing an indication of a lock condition; and j. a ramp generator having an input coupled to receive the indication of a lock condition from said lock detector and an output connected to said gate circuit for causing said ramp generator to supply a ramp output signal to said gate circuit upon an indication of a lock condition in the phase locked loop, which ramp gradually activates said gate circuit.

Claim 12

A phase locked loop comprising: a. a reference oscillator providing an output signal having a fixed predetermined frequency; b. a loop phase detector having a first input connected to receive the output signal of said reference oscillator, a second input and an output; c. an integrating low pass filter having an input connected to the output of said loop phase detector and an output; d. sweep signal producing means connected to said low pass filter for providing a substantially linear ramp voltage at the output of said low pass filter when said sweep signal producing means is activated; e. a voltage controlled oscillator having a control input for controlling the operating frequency thereof connected to the output of said integrating low pass filter and an output having a signal of a predetermined frequency thereon; f. a mixer having a first input connected to the output of said voltage controlled oscillator, a second input and an output connected to the second input of said loop phase detector; g. signal providing means connected to the second input of said mixer for supplying a signal thereto having a frequency separated from the frequency of the output signal of said voltage controlled oscillator by the frequency of the output signal of said reference oscillator; h. a gate circuit connected to the output of the voltage controlled oscillator for connecting the signal therefrom to a suitable load when said gate circuit is activated; i. a lock detector coupled to the phase lock loop and providing an indication of a lock condition; and j. a ramp generator having an input coupled to receive the indication of a lock condition from said lock detector and an output connected to said gate circuit for causing said ramp generator to supply a ramp output signal to said gate circuit upon an indication of a lock condition in the phase locked loop, which ramp gradually activates said gate circuit.