Monolithic transversal filter with charge transfer delay line

Claim 2

A monolithic transversal filter comprising: a plurality of charge transfer means coupled together to form a charge transfer delay line for sequentially transferring analog information in the form of electrical signals; a plurality of sampling means coupled to selected charge transfer means for sensing said electrical signals therein; a plurality of amplifier means, each having an output, an input individually coupled to one of said sampling means, and an amplification characteristic which may be variable fabricated to yield at the output of said amplifier means a signal indicative of the sensed electrical signal amplified by a desired factor and compensated with respect to errors therein occurring within said charge transfer delay line and wherein said plurality of amplifier means are arranged in first and second groups for polarizing the outputs of said amplifier means such that the outputs of the amplifier means comprising said first group are coupled to a first common output and the outputs of the amplifier means comprising said second group are coupled to a second common output; and circuit means coupled to said plurality of amplifier means aand cooperating therewith for providing a differential summation of the output signals from said amplifier means such that the signal on either said first or second common output represents the polarized summation of the error-compensated, amplified electrical signals sensed by said sampling means in said selected charge transfer means.

Claim 3

The monolithic transversal filter as set forth in claim 1 wherein each amplifier means is comprised of a MOSFET with the gate electrode thereof coupled to a sampling means.

Claim 4

The monolithic transversal filter as set forth in claim 2 wherein said characteristic which may be variable fabricated is comprised of the transconductance of said MOSFET.

Claim 5

The monolithic transversal filter as set forth in claim 1 wherein said circuit means is comprised of: first loading means coupled to said first common output, second loading means coupled to said second common output, and constant source means coupled to each amplifier means, such that any change in the electrical signal level on said first common output is inversely reflected in the electrical signal level on said second common output and similarly a change in the electrical signal level on said second common output is inversely reflected in the electrical signal level on said first common output.

Claim 6

The monolithic transversal filter as set forth in claim 4 wherein the arrangement of said amplifier means to provide polarization includes the connection of the source electrode of each amplifier means to said constant source means, the connection of the drain electrode of each amplifier means comprising said first group to said first common output and the connection of the drain electrode of each amplifier means comprising said second group to said second common output.

Claim 7

The monolithic transversal filter as set forth in claim 5 wherein: said first loading means is comprised of a single MOSFET appropriately fabricated and coupled to said first common output, said second loading means is comprised of a single MOSFET appropriately fabricated and coupled to said second common output, said constant source means is comprised of a single MOSFET appropriately fabricated to act as a constant current source and coupled to the source electrodes of each amplifier means.

Claim 8

The monolithic transversal filter as set forth in claim 4 wherein each and every means comprising said apparatus monolithic transversal filter consists of a MOSFET.

Claim 9

A monolithic transversal filter comprising: charge transfer delay line means comprising a plurality of charge transfer means connected in series between an input and a precharger source and disposed in states of X charge transfer means per stage where X is an integer greater than 1, said delay line means further comprising an X-phase power supply wherein each phase of said power supply is coupled respectively to the X charge transfer means of each stage whereby for X phases of said X-phase power supply, information applied to the input of said charge transfer delay line means and stored as charge signal in a charge transfer means is transferred to the corresponding charge transfer means of the next adjacent stage, a plurality of sampling circuit means each comprising an output and X inputs, wherein said X inputs are coupled respectively to the X charge transfer means of preselected stages of said charge transfer delay line means, and wherein the information stored in the X charge transfer means of the preselected stages is sampled respectively for the X phases of each period of said X power supply, and in response thereto, output signals are generated at the outputs of said sampling circuit means indicative of the information stored within the X charge transfer means of the preselected stages and in which the sampling frequency is substantially suppressed, a plurality of amplifier means, each amplifier means comprising a single MOSFET and disposed in a first or second group according to polarity, wherein the gate electrode of each MOSFET is individually coupled to the output of a sampling circuit means and wherein the transconductance of each amplifier means is fabricated in accordance with a predetermined amplification and error-compensation factor; first loading means, comprising an appropriately constructed MOSFET and coupled to the drain electrodes of the amplifier means comprising said first group, second loading means, comprising an appropriately constructed MOSFET, and coupled to the drain electrodes of the amplifier means comprising said second group, constant current source means comprising an appropriately constructed MOSFET coupled to the source electrodes of each amplifier means whereby the output signals of said sampling circuit means are proportionately amplified, error-compensating, polarized and differentially summed and wherein the signal developed at the drain electrodes of the amplifier means comprising said first group or said second group is indicative of said proportionately amplified, error-compensated, polarized summation of said analog information.

Claim 10

A monolithic transversal filter comprising: charge transfer delay line means comprising a plurality of charge transfer means connected in series between an input and a precharger source and disposed in states of X charge transfer means per stage where X is an integer greater than 1, said delay line means further comprising an X-phase power supply wherein each phase of said power supply is coupled respectively to the X charge transfer means of each stage whereby for X phases of said X-phase power supply, information applied to the input of said charge transfer delay line means and stored as charge signal in a charge transfer means is transferred to the corresponding charge transfer means of the next adjacent stage, a plurality of sampling circuit means each comprising an output and X inputs, wherein said X inputs are coupled respectively to the X charge transfer means of preselected stages of said charge transfer delay line means, and wherein the information stored in the X charge transfer means of the preselected stages is sampled respectively for the X phases of each period of said X power supply, and in response thereto, output signals are generated at the outputs of said sampling circuit means indicative of the information stored within the X charge transfer means of the preselected stages and in which the sampling frequency is substantially suppressed, a plurality of amplifier means, each amplifier means comprising a single MOSFET and disposed in a first or second group according to polarity, wherein the gate electrode of each MOSFET is individually coupled to the output of a sampling circuit means and wherein the transconductance of each amplifier means is fabricated in accordance with a predetermined amplification and error-compensation factor; first loading means, comprising an appropriately constructed MOSFET and coupled to the drain electrodes of the amplifier means comprising said first group, second loading means, comprising an appropriately constructed MOSFET, and coupled to the drain electrodes of the amplifier means comprising said second group, constant current source means comprising an appropriately constructed MOSFET coupled to the source electrodes of each amplifier means whereby the output signals of said sampling circuit means are proportionately amplified, error-compensating, polarized and differentially summed and wherein the signal developed at the drain electrodes of the amplifier means comprising said first group or said second group is indicative of said proportionately amplified, error-compensated, polarized summation of said analog information.