Fractional megahertz counter for improved digital synthesizer

Claim 2

In a communication channel synthesizer employing a phase locked loop which utilizes first and second alternate division rates during each phase comparison epoch, apparatus for controlling the duration of utilization of each of said rates in response to mechanical channel selection means, comprising: means, responsive to said selection means, for developing a digitally coded representation of the frequency of the selected channel; counting means, functional in correspondence with a fractional segment of the channel range of said synthesizer, increments of said counting means being associated with channels within said fractional segment, said counting means being incremented, by pulses from said loop, between said coded representation and a predetermined set point associated with an extremity of said fractional segment; and logic means, responsive to said loop and to said counting means, for selectively actuating said alternate rates for respective complementary time periods during each epoch, a first rate being energized while said counting means is incrementing between said representation and said set point, and a second rate being energized during the remainder of the epoch.

Claim 3

Apparatus as described in claim 1 wherein said logic means further comprises means for inhibiting said counting means during said remainder of the epoch.

Claim 4

Apparatus as described in claim 1 adapted to avionics communication apparatus wherein 25 KHz. channels are dispersed continuously in the band 118 through 147.975 MHz., wherein said segment is a given 1 MHz. range therein, said counting means operating on a periodicity of 40 pulses from said loop through a select portion of a 40 increment range, counting from the increment of the selected channel.

Claim 5

Apparatus as described in claim 3 wherein said counting means comprises: a first counter representing hundredths and thousandths of MHz. in accordance with the following code .X00 11 .X25 01 .X50 10 .X75 00; and a second counter representing tenths of MHz in accordance with the following code .0 1110 .1 1101 .2 1011 .3 0110 .4 1100 .5 1000 .6 0000 .7 0001 .8 0011 .9 0111.

Claim 6

Apparatus as described in claim 1 wherein said digitally coded representation includes separate coded designations for respective frequency increments and multiple increments, and wherein said counting means comprises separate counters corresponding to and operating in accordance with said increments and multiple increments.

Claim 7

In a communication system utilizing a specified frequency band divided into contiguous communication channels, channel selection control apparatus comprising: pulse frequency division means, operable in accordance with alternative first or second frequency division factors; means for deriving a clock signal in response to said frequency division means; means for selecting the frequency of a channel for communication; means for providing a digitally encoded representation of the selected channel; counting means, responsive to said clock signal and operable through a range corresponding to allocation of channels through a select fractional segment of said band, for counting through a predetermined portion of said range in proportion to the location of said encoded representation within said segment; and logic means, responsive to said counting means, for controlling said division means to operate between said first and second factors for periods corresponding to said predetermined portion of said range.

Claim 8

In a communication system utilizing a specified frequency band divided into contiguous communication channels, channel selection control apparatus comprising: pulse frequency division means, operable in accordance with alternative first or second frequency division factors; means for deriving a clock signal in response to said frequency division means; means for selecting the frequency of a channel for communication; means for providing a digitally encoded representation of the selected channel; counting means, responsive to said clock signal and operable through a range corresponding to allocation of channels through a select fractional segment of said band, for counting through a predetermined portion of said range in proportion to the location of said encoded representation within said segment; and logic means, responsive to said counting means, for controlling said division means to operate between said first and second factors for periods corresponding to said predetermined portion of said range.

Claim 9

Apparatus as described in claim 6 wherein said means for providing comprises separate encoding means for respective orders of magnitude of frequency of the selected channel, and said counting means comprises corresponding separate counters, interconnected with one another to generate a count through said fractional segment, each counting increment being associated with a different channel in said segment.

Claim 10

Apparatus as described in claim 7 wherein said counters are programmed to initiate counting periodically, and wherein said counters are preloaded to being counting at an increment corresponding to the selected channel, and to continue counting through a set point corresponding with an extremity of said segment.

Claim 11

Apparatus as described in claim 8, wherein said logic means includes means for alternately enabling said division means to operate periodically between said factors while said counter is incrementing through said predetermined portion of said segment, and to operate with said first factor for a complementary portion of the programmed counting period of said counters.

Claim 12

Apparatus as described in claim 6 adapted to avionics communication apparatus wherein 25 KHz channels are dispersed continuously in the band 118 through 147.975 MHz, wherein said first and second factors respectively are 40 and 41, wherein said counting means operates on a periodicity of 40 clock pulses through a select portion of a 40 increment range, counting from the increment of the selected channel through the increment corresponding to 0.000 MHz, said logic means enabling said division means to operate periodically between the factors 40 and 41 while said counting means is counting from the increment of the selected channel through the maximum increment and to operate with the factor 40 during the remainder of the period of said counting means.

Claim 13

Apparatus as described in claim 10 wherein said counting means comprises: a first counter representing hundredths and thousandths of MHz in accordance with the following code .X00 11 .X25 01 .X50 10 .X75 00; and a second counter representing tenths of MHz in accordance with the following code .0 1110 .1 1101 .2 1011 .3 0110 .4 1100 .5 1000 .6 0000 .7 0001 .8 0011 .9 0111.