US3947778A
Expired / Lapsed
US
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Differential amplifier
Assignee: Motorola Solutions Inc
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Filing: 1974-09-11
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Granted: 1976-03-30
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Expires: 1994-09-11
Abstract
Abstract A family of differential amplifiers are described which utilize only MOSFET transistors as the active devices. These amplifiers exhibit an infinite input impedance and zero input offset and bias currents. The circuits are capable of operating over a wide range of DC supply voltages at extremely low DC current drain. A differential amplifier is shown which operates from a single positive DC supply voltage and which handles a wide range of input common mode voltage swings including some negative common mode voltages. Another amplifier is shown which operates from a combination of a single positive and a single negative supply voltage and which handles a wide range of positive and negative input common mode voltage swings.
Inventors
- 👤 Perng Hsiao
- 👤 Fuad H. Musa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 17:46
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45479; H03F3/45632; H03F3/45744; H03F3/45076; H03F3/45179; H03F3/45183; H03F2203/00; H03F2203/45; H03F2203/45508; H03F2203/45651; H03F2203/45674; H03F2203/45676; H03F2203/45696
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
156 words
A differential amplifier comprising: a. MOSFET constant current source means for setting an operating current level; b. differential input means, coupled to said MOSFET constant current source means, having a first input terminal and a second input terminal for receiving two input signals to be compared, said differential input means comprising MOSFET devices of a first conductivity type; c. load means comprising MOSFET active load devices of a second conductivity type opposite to said first conductivity type, coupled to said differential input means and coupled to one or more output terminals for producing an output signal responsive to said differential input means, said output terminal having a quiescient operating point determined by said operating current level; d. load bias means coupled to said output terminals and said active loads for generating a compensating response to variations in said operating current level to maintain said quiescient operating point while also maintaining balanced operation of said output signal.
Claim 2
Dependent Claim
156 words
A differential amplifier comprising: a. MOSFET constant current source means for setting an operating current level; b. differential input means, coupled to said MOSFET constant current source means, having a first input terminal and a second input terminal for receiving two input signals to be compared, said differential input means comprising MOSFET devices of a first conductivity type; c. load means comprising MOSFET active load devices of a second conductivity type opposite to said first conductivity type, coupled to said differential input means and coupled to one or more output terminals for producing an output signal responsive to said differential input means, said output terminal having a quiescient operating point determined by said operating current level; d. load bias means coupled to said output terminals and said active loads for generating a compensating response to variations in said operating current level to maintain said quiescient operating point while also maintaining balanced operation of said output signal.
Claim 3
Dependent Claim
63 words
A differential amplifier as recited in claim 1, and further including: a source of potential having at least a first and a second voltage level; and a MOSFET biasing network connected between said first and second level of potential for providing a reference voltage; said MOSFET constant current source means responsive to said reference from said biasing network for providing a constant current.
Claim 4
Dependent Claim
111 words
A differential amplifier as recited in claim 1, wherein said differential input means comprises: a first input device having source, drain and gate electrodes; a second input device having source, drain and gate electrodes; said source electrodes of said first and second input devices being connected together and being coupled to said constant current source means; said gate electrode of said first input device being adapted to receive a first input signal to be compared; said gate electrode of said second input device being adapted to receive a second input signal to be compared; and said first input device and said second input device being MOSFETs of said first conductivity type.
Claim 5
Dependent Claim
156 words
A differential amplifier as recited in claim 2, wherein said biasing network comprises: an N-channel MOSFET device having source, drain and gate electrodes; a first P-channel MOSFET device having source, drain and gate electrodes; a second P-channel MOSFET device having source, drain and gate electrodes; said source electrode of said N-channel device being connected to said first voltage level; said gate electrode of said N-channel device being connected to said drain electrode of said N-channel device and said drain electrode of said first P-channel device and being further connected to said gate electrode of said first P-channel device; said source electrode of said first P-channel device being connected to said drain electrode and said gate electrode of said second P-channel MOSFET device; said source electrode of said second P-channel device being connected to said second voltage level; and said junction of said gate electrode and drain electrode of said second P-channel device furnishing a reference current.
Claim 6
Dependent Claim
159 words
A differential amplifier as recited in claim 2, wherein said biasing network comprises: an N-channel MOSFET device biasing source, drain and gate electrodes; a first P-channel MOSFET device having source, drain and gate electrodes; said source electrode of said N-channel device being connected to said first voltage level; said gate electrode of said N-channel device forming a junction with said drain electrode of the same device and that junction being connected to said drain electrode of said first P-channel device; said gate electrode of said first P-channel device being adapted to receive an input offset and bias adjust signal; said source electrode of said first P-channel device being connected to the junction of said gate electrode and said drain electrode of said second P-channel device; said source electrode of said second P-channel device being connected to said second voltage level; and said junction of said gate electrode and drain electrode of said second P-channel device furnishing a reference current.
Claim 7
Dependent Claim
89 words
A differential amplifier as recited in claim 2, wherein said biasing network comprises: a variable resistor having a first and a second terminal, said first terminal being connected to said first voltage level; a P-channel MOSFET device having source, drain and gate electrodes; said second terminal of said resistor being connected to a junction of said gate electrode and said drain electrode of said P-channel device; said source electrode of said P-channel device being connected to said second voltage level; and said junction being a source of reference current.
Claim 8
Dependent Claim
115 words
A differential amplifier as recited in claim 2, wherein said biasing network comprises: a first P-channel device having source, drain and gate electrodes; a second P-channel device having source, drain and gate electrodes; said drain electrode of said first P-channel device being connected to ground potential; said gate electrode of said first P-channel device being adapted to receive an input offset and bias adjust signal; said source electrode of said first P-channel device being connected to a junction of said drain electrode and said gate electrode of said second P-channel device; said source electrode of said second P-channel device being connected to said second voltage level; and said junction being a source of reference current.
Claim 9
Dependent Claim
68 words
A differential amplifier as recited in claim 2, wherein said constant current source comprises: a first P-channel device having source, drain and gate electrodes; said source electrode being connected to said second voltage level; said drain electrode connected to said input stage for furnishing a constant current to said input stage; and said gate electrode of said first P-channel device responsive to the output of said biasing network.
Claim 10
Dependent Claim
46 words
A differential amplifier as recited in claim 8, and further including: a resistor connected in series between said source electrode of said first P-channel device and said second voltage level; and a resistor connected in series between said MOSFET biasing network and said second voltage level.
Claim 11
Dependent Claim
79 words
A differential amplifier as recited in claim 8, and further including: a second P-channel device having source, drain and gate electrodes; said gate electrode of said second P-channel device being connected to said gate electrode of said first P-channel device; said drain electrode of said second P-channel device being connected to said drain electrode of said first P-channel device; and said source electrode of said second P-channel device being connected to said source electrode of said first P-channel device.
Claim 12
Dependent Claim
25 words
A differential amplifier as recited in claim 3, and further including: a source of potential having at least a first and a second voltage level.
Claim 13
Dependent Claim
159 words
A differential amplifier as recited in claim 11, wherein said load means comprises: a first load device having source, drain and gate electrodes; a second load device having source, drain and gate electrodes; said source electrode of said first load device being connected to said source electrode of said second load device and to said first voltage level; said drain electrode of said first load device being connected to said drain electrode of said first input device for forming a first output terminal; said drain electrode of said second load device being connected to said drain electrode of said second input device for forming a second output terminal; said gate electrode and said drain electrode of said first load device and said gate electrode and said drain electrode of said second load device each being coupled to said load bias means; and said first load device and said second load device each being MOSFETs of said second conductivity type.
Claim 14
Dependent Claim
77 words
A differential amplifier as recited in claim 12, wherein said load bias means comprises: a first resistor connected between said gate electrode of said first load device and said drain electrode of said same device; a second resistor connected between said gate electrode of said second load device and said drain electrode of said same device; and a conductor connecting said gate electrode of said first load device and said gate electrode of said second load device.
Claim 15
Dependent Claim
42 words
A differential amplifier as recited in claim 12, wherein said load bias means comprises: a. a conductor interconnecting said drain electrode of said first load device, said gate electrode of said same device and said gate electrode of said second load device.
Claim 16
Dependent Claim
35 words
A differential amplifier as recited in claim 13, wherein said MOSFET devices of a first conductivity type are P-channel MOSFETs and wherein said MOSFET active load devices of a second conductivity type are N-channel MOSFETs.
Claim 17
Dependent Claim
35 words
A differential amplifier as recited in claim 14, wherein said MOSFET devices of a first conductivity type are P-channel MOSFETs and wherein said MOSFET active load devices of a second conductivity type are N-channel MOSFETs.
Claim 18
Dependent Claim
140 words
A differential amplifier as recited in claim 16, and further comprising: a third N-channel load device having source, drain and gate electrodes; a fourth N-channel load device having source, drain and gate electrodes; said source electrode of said third N-channel load device being connected to said drain electrode of said first N-channel load device, and said gate electrode of said third N-channel load device being connected to said drain electrode of said first P-channel input device; and said source electrode of said fourth N-channel load device being connected to said drain electrode of said second N-channel load device and said gate electrode of said fourth N-channel load device being connected to said drain electrode of said third N-channel load device, and said drain electrode of said third N-channel device being connected to said drain electrode of said P-channel input device.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-03-30 | 1979-09-29 | 1980-03-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-03-30 | 1983-09-29 | 1984-03-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-03-30 | 1987-09-29 | 1988-03-30 | $7700.00 | Window Closed / Lapsed |