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US3947629A Expired / Lapsed US ⏱️ 0.0 years remaining

Television receiver I. F. circuitry

Assignee: Panasonic Holdings Corp
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Filing: 1975-06-04
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Granted: 1976-03-30
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Expires: 1995-06-04
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Abstract

Abstract A television receiver comprising a first printed circuit board having a helical resonator filter, an adjacent channel trap circuit and an impedance converter circuit for providing a reduced output impedance, the first printed circuit board being secured to the tuner casing, and a second printed circuit board having first and subsequent i-f amplifier stages, the two printed circuit boards being connected to each other, whereby good skirt characteristics can be simply obtained. Also, no overall adjustment is required but the tuner and i-f amplifier may be adjusted separately, thus providing improved serviceability.

Inventors

  • 👤 Toshihide Tanaka
  • 👤 Seiji Fujisawa
  • 👤 Susumu Ide

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 19:41
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/44; H04N5/4446; H03; H03D; H03D7/00; H03D7/12

Claims Analysis

Total Claims: 1
Claim 1
Independent Claim 317 words
The claim: A television receiver set including a tuner casing having a tuner circuit, and a circuit means for determining an overall frequency selectivity characteristic of a video IF signal, said circuit means comprising: a. a first IF circuit comprising a first printed circuit board secured to said casing and including a filter circuit having a helical filter and an adjacent channel trap having an output and connected to said helical filter through a capacitor for determining a portion of said overall frequency selectivity characteristic and providing the video IF signal, and b. a second IF circuit being adjusted for determining the portion of said overall frequency selectivity characteristic and comprising a second printed circuit board separated from but electrically connected through a shielded wire to said first IF circuit and including means for amplifying the video IF signal, said second IF circuit and said shielded wire being adjusted with respect to the portion of the overall frequency characteristic determined by said first IF circuit, wherein said first IF circuit further includes an impedance conversion circuit connected between said channel trap and said shielded wire and having a low impedance for suppressing the influence of deviations possibly caused in the adjustment of the shielded wire and the second IF circuit to the first IF circuit, said conversion circuit comprising a transistor, a first resistor of a low impedance pure resistance connected as a collector output load of said transistor to said shielded wire, a second resistor connected to the emitter of said transistor, and a base bias circuit connected to the base of said transistor for applying a fixed DC bias voltage thereto, and wherein said base is AC coupled to the output of said channel trap, whereby said first and second IF circuits can be substantially independently adjusted to obtain the overall frequency selectivity characteristic and mutual adjustment therefor of both circuits can be dispensed with.

References Cited (Backward Citations)

US2356308A Cited
US3217096A Cited
US3387214A Cited
US3381236A Cited
US3624515A Cited
US3584141A Cited
US3723884A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-03-30 1979-09-29 1980-03-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-03-30 1983-09-29 1984-03-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-03-30 1987-09-29 1988-03-30 $7700.00 Window Closed / Lapsed

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