Electronic circuit package and method of brazing

Claim 3

In the art of manufacturing electronic device packages comprising a ceramic layer having a plurality of electrical lead pin receiving holes extending therethrough, the method of affixing gold-plated lead pins within the ceramic layer, comprising the steps of: interiorly plating each of the holes with palladium-silver; interiorly plating each of the palladium-silver lined holes with gold; depositing a gold germanium solder paste having flow characteristics when heated, on one surface of the layer, and being positioned to flow into each of the holes when heated; positioning a plurality of gold-plated pins within the holes; and heating at least the area surrounding the holes including said solder paste causing the brazing of the gold-plated pins to the gold plating on the holes with said solder paste.

Claim 4

In the art of manufacturing electronic device packages comprising a ceramic layer having a plurality of electrical lead pin receiving holes extending therethrough, the method of affixing gold-plated lead pins within the ceramic layer, comprising the steps of: interiorly plating each of the holes with palladium-silver; interiorly plating each of the palladium-silver lined holes with gold; depositing a gold germanium solder paste having flow characteristics when heated, on one surface of the layer, and being positioned to flow into each of the holes when heated; positioning a plurality of gold-plated pins within the holes; and heating at least the area surrounding the holes including said solder paste causing the brazing of the gold-plated pins to the gold plating on the holes with said solder paste.

Claim 5

In the art of manufacturing electronic device packages comprising a ceramic layer having a plurality of electrical lead pin receiving holes extending therethrough, the method of affixing gold-plated lead pins within the ceramic layer, comprising the steps of: interiorly metalizing each of the holes with palladium-silver; interiorly metalizing each of the palladium-silver lined holes with gold; screen printing a gold germanium solder paste in ring shape configurations on one surface of said layer, each configuration of solder paste contiguous to and bordering the periphery of each of the holes; positioning a plurality of gold-plated pins within respective holes and to contact said solder paste; and heating at least the area surrounding the holes in an inert atmosphere of nitrogen causing the brazing of the pins to said gold disposed on said palladium-silver lined holes with said solder paste.

Claim 6

In the art of manufacturing electronic device packages comprising a ceramic layer having a plurality of electrical lead pin receiving holes extending therethrough, the method of affixing gold-plated lead pins within the ceramic layer, comprising the steps of: interiorly metalizing each of the holes with palladium-silver; interiorly metalizing each of the palladium-silver lined holes with gold; screen printing a gold germanium solder paste in ring shape configurations on one surface of said layer, each configuration of solder paste contiguous to and bordering the periphery of each of the holes; positioning a plurality of gold-plated pins within respective holes and to contact said solder paste; and heating at least the area surrounding the holes in an inert atmosphere of nitrogen causing the brazing of the pins to said gold disposed on said palladium-silver lined holes with said solder paste.

Claim 7

The method of affixing gold-plated lead pins within a ceramic layer as recited in claim 3 wherein, the solder paste screen printed on said layer is formed of substantially 88% gold and 12% germanium by weight.

Claim 8

In the art of manufacturing electronic device packages comprising a ceramic layer, the method of solderably joining a discrete object to the ceramic layer, comprising the steps of: metalizing palladium-silver on an area of a ceramic layer where a joining is to occur; metalizing the palladium-silver area with gold; gold plating a discrete object in an area to be joined to the ceramic layer; disposing said gold-plated area of the discrete object in proximity of said metalized area of the ceramic layer for joining to occur by brazing; and brazing the gold on the discrete object to the gold on the ceramic layer, with a gold-geranium solder.

Claim 9

In the art of manufacturing electronic device packages comprising a ceramic layer, the method of solderably joining a discrete object to the ceramic layer, comprising the steps of: metalizing palladium-silver on an area of a ceramic layer where a joining is to occur; metalizing the palladium-silver area with gold; gold plating a discrete object in an area to be joined to the ceramic layer; disposing said gold-plated area of the discrete object in proximity of said metalized area of the ceramic layer for joining to occur by brazing; and brazing the gold on the discrete object to the gold on the ceramic layer, with a gold-geranium solder.

Claim 10

An electronic device package comprising: a ceramic layer having opposing surfaces with a plurality of holes communicating with said surfaces; an electronic device mounted on one of said surfaces of said layer; an array of electrical leads overlying said one of said surfaces of said layer, one end of each lead communicating with a respective hole and the other end of each lead electrically interconnected to said electronic device; a plurality of electrical lead pins, each pin being disposed in one of said holes; and a metallurgical joint integrally securing each of said pins to the ceramic layer, said joint comprising: a palladium-silver layer metalized on the surfaces defining said holes; a gold layer metalized on said palladium-silver layer; a gold layer plated on said pins; and a brazed joint joining both of said gold layers, said brazed joint formed of a gold-germanium filler metal.

Claim 11

An electronic device package comprising: a ceramic layer having opposing surfaces with a plurality of holes communicating with said surfaces; an electronic device mounted on one of said surfaces of said layer; an array of electrical leads overlying said one of said surfaces of said layer, one end of each lead communicating with a respective hole and the other end of each lead electrically interconnected to said electronic device; a plurality of electrical lead pins, each pin being disposed in one of said holes; and a metallurgical joint integrally securing each of said pins to the ceramic layer, said joint comprising: a palladium-silver layer metalized on the surfaces defining said holes; a gold layer metalized on said palladium-silver layer; a gold layer plated on said pins; and a brazed joint joining both of said gold layers, said brazed joint formed of a gold-germanium filler metal.

Claim 12

An electronic device package comprising: a ceramic layer having opposing surfaces with a plurality of holes communicating said surfaces; an electronic device mounted on one of said surfaces of said layer; an array of electrical leads overlying said one of said surfaces of said layer, one end of each lead communicating with a respective hole and the other end of each lead electrically interconnected to said electronic device; a plurality of electrical lead pins, each pin being disposed in one of said holes; and a metallurgical joint integrally securing each of said pins to the ceramic layer, said joint comprising: 1. a metal layer metalized on the surfaces defining said holes; 2. a gold layer metalized on said metal layer; 3. a gold layer plated on said pins; and 4. a brazed joint solderably joining both of said gold layers, said brazed joint formed of a gold germanium filler metal.

Claim 13

An electronic device package comprising: a ceramic layer having opposing surfaces with a plurality of holes communicating said surfaces; an electronic device mounted on one of said surfaces of said layer; an array of electrical leads overlying said one of said surfaces of said layer, one end of each lead communicating with a respective hole and the other end of each lead electrically interconnected to said electronic device; a plurality of electrical lead pins, each pin being disposed in one of said holes; and a metallurgical joint integrally securing each of said pins to the ceramic layer, said joint comprising: 1. a metal layer metalized on the surfaces defining said holes; 2. a gold layer metalized on said metal layer; 3. a gold layer plated on said pins; and 4. a brazed joint solderably joining both of said gold layers, said brazed joint formed of a gold germanium filler metal.