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US3939336A
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Apparatus for analysis of network diagrams
Assignee: Individual
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Filing: 1974-12-02
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Granted: 1976-02-17
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Expires: 1994-12-02
Abstract
Abstract An apparatus for analysis of network diagrams, comprising a branch model unit wherein the branch models are connected to one another in accordance with the topology of the network diagram by means of a patch board, and a control unit connected to the branch model unit. Each branch model of said branch model unit includes a time interval forming unit, which time interval corresponds to the length of the respective branch, and an indication unit having three terminals, one of these terminals being connected to the output of the time interval forming unit, the second terminal being connected to the input of the latter, and the third terminal serving as the end point of the respective branch model, the starting point of this branch model being the input of the time interval forming unit. The control unit includes a calendar device, both the calendar device and control subunit being connected to a pulse generator.
Inventors
- 👤 Vsevolod Viktorovich Vasiliev
- 👤 Alexandr Georgievich Dodanov
- 👤 Alla Nikolaevna Klepikova
- 👤 Anatoly Grigorievich Timoshenko
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 03:58
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/20; G06F2111/00; G06F2111/12
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
171 words
An apparatus for analysis of network diagrams, comprising: a pulse generator; a branch model unit, the number of branch models wherein is equal to that of branches in the network diagram and each branch model includes a time interval forming unit having an input (15) which serves as the input of said branch model; a branch model state indication unit having at least three terminals, one of the terminals being connected to the output of said time interval forming unit, the second terminal (9) being connected to said input (15) of said branch model, and the third terminal serving as the output (16) of said branch model; a patch board whose terminal jacks (17) are connected to the inputs (15) and outputs (16) of said branch models and, through patch cords (18), to one another in accordance with the topology of the network diagram; and a control unit including a calendar device (26) and a control subunit (25) connected to said calendar device, patch board, pulse generator and branch model unit.
Claim 2
Independent Claim
171 words
An apparatus for analysis of network diagrams, comprising: a pulse generator; a branch model unit, the number of branch models wherein is equal to that of branches in the network diagram and each branch model includes a time interval forming unit having an input (15) which serves as the input of said branch model; a branch model state indication unit having at least three terminals, one of the terminals being connected to the output of said time interval forming unit, the second terminal (9) being connected to said input (15) of said branch model, and the third terminal serving as the output (16) of said branch model; a patch board whose terminal jacks (17) are connected to the inputs (15) and outputs (16) of said branch models and, through patch cords (18), to one another in accordance with the topology of the network diagram; and a control unit including a calendar device (26) and a control subunit (25) connected to said calendar device, patch board, pulse generator and branch model unit.
Claim 3
Dependent Claim
138 words
An apparatus as claimed in claim 1, wherein said time interval forming unit comprises: a main pulse counter (32); a time interval forming flip-flop (33), one input whereof serves as the input (15) of said time interval forming unit and as the input (15) of said branch model and is connected to one of the terminal jacks (17) of said patch board, while the other input is connected to the output of said main pulse counter (32); and an AND circuit (34), one input whereof is connected to said control unit, the other input is connected to the output of said time interval forming flip-flop (33), and the output is connected to the input of said main pulse counter (32), the output of the main pulse counter (32) serving as the output of the time interval forming unit.
Claim 4
Dependent Claim
156 words
An apparatus as claimed in claim 1, wherein said time interval forming unit comprises: a main pulse counter (32); an auxiliary pulse counter (35) whose input is connected to the input of said main pulse counter (32); a time interval forming flip-flop (33), one input whereof serves as the input (15) of said time interval forming unit and as the input (15) of said branch model and is connected to one of the terminal jacks (17) of said patch board, while the other input is connected to the output of said auxiliary pulse counter (35); and an AND circuit (34), one input whereof is connected to said control unit, the other input is connected to the output of said time interval forming flip-flop (33), and the output is connected to the input of said main pulse counter (32), the output of the main pulse counter (32) serving as the output of the time interval forming unit.
Claim 5
Dependent Claim
170 words
An apparatus as claimed in claim 1, wherein said indication unit comprises: an indication flip-flop (40), one input whereof is connected to the output of said time interval forming unit, the other input is connected via a feedback circuit (41) to the output (16) of said branch model, and the output is connected via a diode (42) is connected to the same output (16) of said branch model; an AND circuit (43), one input whereof is connected to the output of said indication flip-flop (40), and the other input is connected to said control unit; a first inverter (46), the input whereof is connected to the output of said AND circuit (43), and the output is connected to the input of said time interval forming unit; an indication element (45) connected to the output of said AND circuit; and a second inverter (44), the input whereof is connected to the output (16) of said branch model, and the output is connected to a third input of said AND circuit (43).
Claim 6
Dependent Claim
195 words
An apparatus as claimed in claim 1, wherein said indication unit comprises: an indication flip-flop (40), one input whereof is connected to the output of said time interval forming unit, and the other input is connected via a feedback circuit to the output (16) of said branch model; a time interval termination flip-flop (47), one input whereof is connected to the output of said time interval forming unit, the other input (12) is connected to said control unit, and the output is connected via a diode (42) to the output (16) of said branch model; an AND circuit (43), one input whereof is connected to the output of said indication flip-flop (40), and the other input (12) is connected to said control unit; a first inverter (44) having its input connected to the output (16) of said branch model and its output connected to the third input of said AND circuit (43); a second inverter (46) having its input connected to the output of said AND circuit (43) and its output connected to the input of said time interval forming unit; and an indication element (45) connected to the output of said AND circuit (43).
Claim 7
Dependent Claim
193 words
An apparatus as claimed in claim 1, wherein said indication unit comprises: an indication flip-flop (40), one input whereof is connected to the output of said time interval forming unit; a first AND circuit (48), one input (13) whereof is connected to said control unit, and the output is connected to the second input of said indication flip-flop (40); a time interval termination flip-flop (47), one input whereof is connected to the output of said time interval forming unit, the other input (12) is connected to said control unit, and the output is connected via a diode (42) to the output (16) of said branch model; a first inverter 44 having its input connected to the output 16 of said branch model and its output connected to the third input of said second AND circuit (43) and to the second input of said first AND circuit (45); a second inverter (46) having its input connected to the output of said second AND circuit (43) and its output connected to the input (15) of said time interval forming unit; and an indication element (45) connected to the output of said second AND circuit (43).
Claim 8
Dependent Claim
59 words
An apparatus as claimed in claim 1, wherein said calendar device comprises: a counter (49) whose input is connected to a first output (51) of said control subunit; and a decoder (50), the inputs whereof are connected to the inputs of said counter (49), and the output is connected to a first input (52) of said control subunit (25).
Claim 9
Dependent Claim
407 words
An apparatus as claimed in claim 1, wherein said control subunit (25) comprises: a generator (61) of single pulses, the input (27) whereof is connected to the output of said pulse generator, the first output (22) is connected to one of the inputs of the main counter (32) in each said branch model (6), and the second output (19) is connected to the terminal jack (17) of said patch board (4), corresponding to the initial node of the network diagram; a first AND circuit (60) whose output (24) is connected to the first input (13) of the first AND circuit (48) of said indication unit in each branch model; a second AND circuit (57), one input whereof is connected to the first input of said first AND circuit, the other input is connected to said pulse generator and to said input (27) of said generator (61) of single pulses, and the output (51) is connected to the input of said calendar device (26); a third AND circuit (58), one input whereof is connected to said pulse generator, the second input is connected to the first input of said first AND circuit (60), the third input is connected to the input (52) of said control subunit, and the output (21) is connected to the second input of the AND circuit (34) of said time interval forming unit in each branch model; an inverter (59) having its input connected to said pulse generator and to said first input of said third AND circuit (58) and its output connected to the second input of said first AND circuit (60); a flip-flop (55), one input whereof is connected to the second input of said generator (61) of single pulses, the other input (20) is connected to the terminal jack (17) of said patch board, corresponding to the final node of the network diagram, and a first output of the flip-flop (55) is connected to the first input of said first AND circuit (60); a fourth AND circuit (56), one input whereof is connected to the second output of said generator (61) of single pulses, the other input is connected to the second output of said flip-flop (55), and the output (23) is connected to the second inputs 12 of said first AND circuits (43) of said indication units in each branch model; and a pulse counter (53) whose input is connected to the output (21) of said third AND circuit (58).
Claim 10
Independent Claim
200 words
An apparatus for analysis of network diagrams, comprising; a pulse generator; a branch model unit, the number of branch models wherein is equal to that of branches in the network diagram and each branch model includes a time interval forming unit having an input (15) which serves as the input of said branch model; a branch model state indication unit having at least three terminals, one terminal being connected to the output of said time interval forming unit, the second terminal (9) being connected to said input (15) of said branch model, and the third terminal serving as the output (16) of said branch model; a node model unit, the number of node models wherein is equal to that of nodes in the network diagram; a patch board whose terminal jacks (17) are connected to the inputs (15) and outputs (16) of said branch models, to terminals (31) of said node models (28) and, through patch cords (18), to one another in accordance with the topology of the network diagram; and a control unit including a calendar device (26) and a control subunit (25) connected to said calendar device, patch board, pulse generator, branch model unit and node model unit.
Claim 11
Independent Claim
200 words
An apparatus for analysis of network diagrams, comprising; a pulse generator; a branch model unit, the number of branch models wherein is equal to that of branches in the network diagram and each branch model includes a time interval forming unit having an input (15) which serves as the input of said branch model; a branch model state indication unit having at least three terminals, one terminal being connected to the output of said time interval forming unit, the second terminal (9) being connected to said input (15) of said branch model, and the third terminal serving as the output (16) of said branch model; a node model unit, the number of node models wherein is equal to that of nodes in the network diagram; a patch board whose terminal jacks (17) are connected to the inputs (15) and outputs (16) of said branch models, to terminals (31) of said node models (28) and, through patch cords (18), to one another in accordance with the topology of the network diagram; and a control unit including a calendar device (26) and a control subunit (25) connected to said calendar device, patch board, pulse generator, branch model unit and node model unit.
Claim 12
Dependent Claim
52 words
An apparatus as claimed in claim 9, wherein said node model (28) is made as a resistor, one end whereof is the terminal (31) of said node model and is connected to one of the terminal jacks (17) of said patch board, and the other end is connected to a power supply.
Claim 13
Dependent Claim
158 words
An apparatus as claimed in claim 9, wherein said node model (28) comprises: a counter (36) of regeneration of time intervals of said branch models having their inputs (15) connected to said node model (28); a regeneration flip-flop (39), one input whereof is connected to the ouput of said counter (36) of regeneration of time intervals and the other input (30) is connected to said control unit; a first AND circuit (37), one input whereof is connected to the output of said regeneration flip-flop (39) and the output serves as the terminal (31) of said node model (28) and is connected to one of the terminal jacks (17) of said patch board; and a second AND circuit (38), one input whereof is connected to the output of said first AND circuit, the other input (29) is connected to said control unit, and the output is connected to the input of said counter (36) of regeneration of time intervals.
References Cited (Backward Citations)
US3474240A
Cited
US3558868A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-02-16 | 1979-08-18 | 1980-02-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-02-16 | 1983-08-18 | 1984-02-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-02-16 | 1987-08-18 | 1988-02-17 | $7700.00 | Window Closed / Lapsed |