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US3937986A Expired / Lapsed US ⏱️ 0.0 years remaining

Linear waveform generator

Assignee: Xerox Ltd
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Filing: 1974-03-11
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Granted: 1976-02-10
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Expires: 1994-03-11
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Abstract

Abstract A transistor timing ramp generator having collector, emitter and base electrodes and having a capacitor connected between collector and base, a resistance connected between base and emitter, the emitter being connected directly to a first input terminal, a resistive load in the collector circuit and means for supplying a signal to a second input terminal in the collector circuit and the input terminal to switch on the transistor when said signal is supplied, and to operate in the region where the base-emitter potential is substantially constant, thus providing a constant current to charge the capacitor and thereby obtaining a linear timing ramp at the collector which approaches the potential of said signal.

Inventors

  • 👤 Arnold Wilson

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 14:32
CPC Classifications
H; H03; H03K; H03K4/00; H03K4/06; H03K4/08; H03K4/48; H03K4/50; H03K4/56; G; G04; G04F; G04F10/00; G04F10/10

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 127 words
A timing ramp generating comprising first and second transistors each having collector, emitter and base electrodes, a capacitor connected between base of said first transistor and the collector of said second transistor, a resistance connected between the base and emitter of said first transistor, the emitter of said first transistor being connected to a first terminal and the base of said second transistor, a resistive load coupled intermediate the collector of said second transistor, and a second terminal, said second terminal connected to the collector of said first transistor, source of d.c. voltage connected across said first and second terminals, whereby a constant current charges the capacitor and a linear timing ramp is generated at the collector of said second transistor which approaches the applied d.c. voltage.
Claim 2
Dependent Claim 127 words
A timing ramp generating comprising first and second transistors each having collector, emitter and base electrodes, a capacitor connected between base of said first transistor and the collector of said second transistor, a resistance connected between the base and emitter of said first transistor, the emitter of said first transistor being connected to a first terminal and the base of said second transistor, a resistive load coupled intermediate the collector of said second transistor, and a second terminal, said second terminal connected to the collector of said first transistor, source of d.c. voltage connected across said first and second terminals, whereby a constant current charges the capacitor and a linear timing ramp is generated at the collector of said second transistor which approaches the applied d.c. voltage.
Claim 3
Dependent Claim 179 words
A timing ramp generator including a main transistor having collector, emitter and base electrodes and having a capacitor connected between collector and base, a resistance connected between base and emitter, the emitter being connected directly to a first terminal, a resistive load in the collector circuit, means for supplying a d.c. voltage across a second input terminal in the collector circuit and the first terminal to switch on the transistor when said voltage is supplied, and to operate in the region where the base-emitter potential is substantially constant, thus providing a constant current to charge the capacitor and thereby obtaining a linear timing ramp at the collector which approaches the potential of said signal, a constant current device in the collector circuit of said main transistor, said constant current device includes a second transistor of opposite conductivity type to said main transistor, said second transistor havings its base connected to a reference potential, the collector-emitter circuit of said second transistor being connected in series with the collector emitter circuit of said main transistor across said first and second terminals.
Claim 4
Dependent Claim 179 words
A timing ramp generator including a main transistor having collector, emitter and base electrodes and having a capacitor connected between collector and base, a resistance connected between base and emitter, the emitter being connected directly to a first terminal, a resistive load in the collector circuit, means for supplying a d.c. voltage across a second input terminal in the collector circuit and the first terminal to switch on the transistor when said voltage is supplied, and to operate in the region where the base-emitter potential is substantially constant, thus providing a constant current to charge the capacitor and thereby obtaining a linear timing ramp at the collector which approaches the potential of said signal, a constant current device in the collector circuit of said main transistor, said constant current device includes a second transistor of opposite conductivity type to said main transistor, said second transistor havings its base connected to a reference potential, the collector-emitter circuit of said second transistor being connected in series with the collector emitter circuit of said main transistor across said first and second terminals.

References Cited (Backward Citations)

US3194977A Cited
US3189844A Cited
US3313955A Cited
US3509367A Cited
US3551705A Cited
US3619659A Cited
US3794857A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-02-09 1979-08-11 1980-02-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-02-09 1983-08-11 1984-02-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-02-09 1987-08-11 1988-02-10 $7700.00 Window Closed / Lapsed

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