US3935033A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of improving the radiation resistance of silicon transistors with a silicon oxide coating
Assignee: Siemens AG
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Filing: 1973-11-15
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Granted: 1976-01-27
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Expires: 1993-11-15
Abstract
Abstract The radiation resistance of silicon transistors with a silicon oxide coating is improved by irradiating the semiconductor device with electrons at an energy below 150 keV and a dose between 10 9 and 10 12 rad at the boundary layer between the silicon and silicon oxide coating. The temperature of the semiconductor device is maintained at a temperature of between 150° and 450°C during irradiation thereof.
Inventors
- 👤 Rudolf Bauerlein
- 👤 Dieter Uhl
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 16:09
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/01; H10P; H10P95/00; H10W74/40; H10W74/43; Y; Y10; Y10S; Y10S438/00; Y10S438/953
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
76 words
A method of improving the radiation resistance of silicon transistors with a silicon oxide coating, comprising the steps of irradiating a semiconductor device having a silicon oxide coating with electrons at an energy below 150 keV and a dose between 10 9 and 10 12 rad at the boundary layer between the silicon and silicon oxide coating; and maintaining the temperature of the semiconductor device at a temperature of between 150° and 450°C during irradiation thereof.
Claim 2
Independent Claim
76 words
A method of improving the radiation resistance of silicon transistors with a silicon oxide coating, comprising the steps of irradiating a semiconductor device having a silicon oxide coating with electrons at an energy below 150 keV and a dose between 10 9 and 10 12 rad at the boundary layer between the silicon and silicon oxide coating; and maintaining the temperature of the semiconductor device at a temperature of between 150° and 450°C during irradiation thereof.
Claim 3
Dependent Claim
19 words
A method as claimed in claim 1, wherein the radiation dose is between 5.10 9 and 2.10 10 rad.
Claim 4
Dependent Claim
15 words
A method as claimed in claim 1, wherein the semiconductor device is a silicon transistor.
Claim 5
Dependent Claim
21 words
A method as claimed in claim 1, wherein the semiconductor device is a silicon wafer including a plurality of transistor structures.
Claim 6
Dependent Claim
43 words
A method as claimed in claim 1, wherein the semiconductor device is maintained at a temperature of 300° to 400°C during irradiation thereof and is annealed for at least ten hours at a temperature between 300° and 400°C after the termination of irradiation.
Claim 7
Dependent Claim
43 words
A method as claimed in claim 1, wherein the semiconductor device is maintained at a temperature between 200° and 250°C during irradiation thereof and is annealed for at least 10 hours at a temperature between 300° and 350°C after the termination of irradiation.
References Cited (Backward Citations)
US3430043A
Cited
US3570112A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-01-26 | 1979-07-28 | 1980-01-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-01-26 | 1983-07-28 | 1984-01-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-01-26 | 1987-07-28 | 1988-01-27 | $7700.00 | Window Closed / Lapsed |