US3934157A
Expired / Lapsed
US
⏱️ 0.0 years remaining
TTL circuit
Assignee: AT&T Inc
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Filing: 1974-09-23
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Granted: 1976-01-20
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Expires: 1994-09-23
Abstract
Abstract A logic gate circuit includes parallel drive of an output transistor and an inverter transistor by an input transistor. The inverter transistor then drives an active pull-up transistor which improves switching speed. The parallel drive of the invention allows the use of the active pull-up transistor without requiring a change in circuit voltage levels.
Inventors
- 👤 William Joshua Evans
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 18:16
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/082; H03K19/088
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
119 words
A logic gate comprising: an input transistor having a base terminal, a collector terminal and at least one emitter terminal connected to an input node, an output transistor having an emitter terminal adapted to be connected to ground, a base terminal connected directly to the collector terminal of the input transistor and a collector terminal connected to an output node, an inverter transistor having an emitter terminal adapted to be connected to ground, a base terminal connected directly to the collector terminal of the input transistor and a collector terminal, and a pull-up transistor having an emitter terminal connected to the output node, a base terminal connected to the collector terminal of the inverter transistor and a collector terminal.
Claim 2
Dependent Claim
119 words
A logic gate comprising: an input transistor having a base terminal, a collector terminal and at least one emitter terminal connected to an input node, an output transistor having an emitter terminal adapted to be connected to ground, a base terminal connected directly to the collector terminal of the input transistor and a collector terminal connected to an output node, an inverter transistor having an emitter terminal adapted to be connected to ground, a base terminal connected directly to the collector terminal of the input transistor and a collector terminal, and a pull-up transistor having an emitter terminal connected to the output node, a base terminal connected to the collector terminal of the inverter transistor and a collector terminal.
Claim 3
Dependent Claim
23 words
A logic gate as recited in claim 1 wherein said input transistor includes multiple emitters each connected to a different respective input node.
Claim 4
Dependent Claim
88 words
A logic gate as recited in claim 2 further comprising: a series combination of a first and second resistor connected to the base of the input transistor, a third resistor connected to the collector of the inverter transistor, a fourth resistor connected to the collector of the pull-up transistor, a fifth resistor connected between the base of the input transistor and the collector of the input transistor, and a diode connected between the collector of the input transistor and an intermediate node between the first and second resistors.
Claim 5
Dependent Claim
45 words
A logic gate as recited in claim 3 wherein: the first resistor is about 1,000 ohms, the second resistor is about 200 ohms, the third resistor is about 500 ohms, the fourth resistor is about 100 ohms, and the fifth resistor is about 800 ohms.
Claim 6
Dependent Claim
51 words
A logic gate as recited in claim 4 further comprising a source of D.C. potential connected to the base terminal of the input transistor through the series combination, the collector terminal of the inverter transistor through the third resistor, and the collector terminal of the pull-up transistor through the fourth resistor.
Claim 7
Dependent Claim
21 words
A logic gate as recited in claim 5 wherein the source of D.C. potential has a magnitude of about 3 volts.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-01-19 | 1979-07-21 | 1980-01-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-01-19 | 1983-07-21 | 1984-01-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-01-19 | 1987-07-21 | 1988-01-20 | $7700.00 | Window Closed / Lapsed |