Inverter control circuit

Claim 2

A control circuit for a quasi square wave high frequency inverter having solid state switching devices comprising means sensing instantaneous transformer flux and providing an output proportional thereto, a first comparator wherein the output of said flux sensing means and a first reference signal are compared and an output is produced when said output proportional to instantaneous transformer flux exceeds said reference signal, an oscillator having a substantially square wave output at a selected frequency, means responsive to the outputs of said first comparator and said oscillator for providing turn-on and turn-off signals to said solid state switching devices so that the conduction time is controlled to provide a constant level of peak flux from half cycle to half cycle which is below the saturation level.

Claim 3

The control circuit of claim 1 further comprising means responsive to the total instantaneous current flowing through said solid state switching devices, providing an output proportional to said current, a second comparator wherein the output proportional to said instantaneous current and a second reference signal are compared, and an output signal is produced when said instantaneous current exceeds a preselected value established by said reference signal, means connecting said second comparator to said means responsive to said first comparator and said oscillator, so that said second comparator also causes a turn-off response.

Claim 4

The control circuit of claim 2 further comprising first means varying the frequency of said oscillator operative to lower said frequency in response to an increasing input signal, second means responsive to the output of said second comparator having an output which increases in response to increasing average output thereof, said second means operatively associated with said first means so that increasing average output of said comparator reduces said oscillator frequency.

Claim 5

A control circuit for a quasi square wave high frequency inverter having solid state switching devices comprising, means sensing instantaneous transformer flux and providing an output proportional thereto, a first comparator wherein the output of said flux sensing means and a first reference signal are compared and an output signal is produced when said output proportional to instantaneous transformer flux exceeds said reference signal, an oscillator having a substantially square wave output at a frequency substantially twice the inverter frequency, a first flip-flop circuit having set and reset inputs, and an output of either high or low sense, said set input connected to the output of said oscillator and said reset input connected to the output of said first comparator, a second flip-flop having an input and Q and Q outputs, said outputs being of differing sense, said input connected to the output of said oscillator, first and second AND gates each having three inputs and an output, the first input of each of said AND gates connected to the output of said first flip-flop, the second input of each of said AND gates connected to the output of said oscillator, and the third input of said first AND gate connected to the Q output of said second flip-flop, and the third input of said second AND gate connected to the Q output of said second flip-flop, and the outputs of said AND gates connected to said solid state switching device.

Claim 6

A control circuit for a quasi square wave high frequency inverter having solid state switching devices comprising, means sensing instantaneous transformer flux and providing an output proportional thereto, a first comparator wherein the output of said flux sensing means and a first reference signal are compared and an output signal is produced when said output proportional to instantaneous transformer flux exceeds said reference signal, an oscillator having a substantially square wave output at a frequency substantially twice the inverter frequency, a first flip-flop circuit having set and reset inputs, and an output of either high or low sense, said set input connected to the output of said oscillator and said reset input connected to the output of said first comparator, a second flip-flop having an input and Q and Q outputs, said outputs being of differing sense, said input connected to the output of said oscillator, first and second AND gates each having three inputs and an output, the first input of each of said AND gates connected to the output of said first flip-flop, the second input of each of said AND gates connected to the output of said oscillator, and the third input of said first AND gate connected to the Q output of said second flip-flop, and the third input of said second AND gate connected to the Q output of said second flip-flop, and the outputs of said AND gates connected to said solid state switching device.

Claim 7

The control circuit of claim 4 wherein said first reference signal is selected to be equivalent to a level of instantaneous transformer flux less than the saturation level.

Claim 8

The control circuit of claim 5 wherein said means sensing instantaneous transformer flux comprises means sensing the instantaneous voltage of the transformer of said inverter and providing an output signal proportional thereto, means integrating said output signal with respect to time and providing a signal proportional to said integral.

Claim 9

The control circuit of claim 6 wherein said means sensing the instantaneous voltage of said trnsformer comprises a winding on said transformer, and further wherein said means integrating said output comprises an inductor and a resistor in series, across said transformer winding said output taken across aid resistor.

Claim 10

The control circuit of claim 5 wherein said means sensing instantaneous transformer flux comprises a Hall effect transducer.

Claim 11

The control circuit of claim 5 further comprising means sensing the instantaneous current flowing through said solid state switching devices and providing an output voltage proportional to said instantaneous current, a second comparator having two inputs and an output wherein the output of said means sensing the instantaneous current flowing through said solid state switching devices is compared to a second reference signal and an output signal is produced when said output of said means sensing instantaneous current exceeds said reference signal, the output of said second comparator connected to said reset input of said first flip-flop circuit.