Low power, fast rise time current driver for inductive load

Claim 2

A current driver for driving a sense-inhibit line of a magnetic core memory comprising: a transformer having a primary winding with first and second terminals and a secondary winding which is connectable to drive a sense-inhibit line; a first switch connected in series between the first terminal of the primary winding and a voltage source to impress a voltage across the primary winding on command; a capacitor having a first terminal and a second terminal coupled to the second terminal of the primary winding; a diode having a first terminal coupled to ground and a second terminal coupled to the second terminal of the primary winding and the second terminal of the capacitor; a second switch coupled between the first terminal of the capacitor and a voltage supply; and means for selectively charging the capacitor and closing the second switch whereby the charged capacitor increases the voltage impressed across the primary winding and discharges through the primary winding to a voltage which has substantially no effect upon the voltage impressed across the primary winding.

Claim 3

The current driver as set forth in claim 1 above, further comprising a third switch coupled between the first terminal of the capacitor and a voltage supply and a resistance coupled between the third switch and the first terminal of the capacitor.

Claim 4

The current driver as set forth in claim 1 above, further comprising a second diode and a resistance coupled in series between the sense-inhibit line and the first terminal of the capacitor, the diode being oriented to charge the capacitor in response to a voltage induced on the sense-inhibit line when current in the primary winding is rapidly decreased as the first switch is opened.

Claim 5

A current driver for driving the sense-inhibit winding of a core memory comprising: a transformer having a secondary winding coupled between a sense-inhibit winding of a core memory and ground and a primary winding with first and second terminals; a first switch coupled between the first terminal of the primary winding and a first voltage source; a first diode coupled between the second terminal of the primary winding and ground, the first diode being oriented to conduct current through the primary winding in response to the closure of the first switch; a capacitor having a first terminal coupled to the second terminal of the primary winding and a second terminal; a second switch coupled between the second capacitor terminal and a second voltage source; a third switch coupled between the second capacitor terminal and a third voltage source; and a second diode coupled between the second capacitor terminal and a coupling of the transformer secondary winding to a sense-inhibit winding; the second diode being oriented to charge the capacitor in response to an inductive kickback voltage which is generated when the first switch is opened to terminate the passage of current through the primary winding.

Claim 6

A current driver for driving the sense-inhibit winding of a core memory comprising: a transformer having a secondary winding coupled between a sense-inhibit winding of a core memory and ground and a primary winding with first and second terminals; a first switch coupled between the first terminal of the primary winding and a first voltage source; a first diode coupled between the second terminal of the primary winding and ground, the first diode being oriented to conduct current through the primary winding in response to the closure of the first switch; a capacitor having a first terminal coupled to the second terminal of the primary winding and a second terminal; a second switch coupled between the second capacitor terminal and a second voltage source; a third switch coupled between the second capacitor terminal and a third voltage source; and a second diode coupled between the second capacitor terminal and a coupling of the transformer secondary winding to a sense-inhibit winding; the second diode being oriented to charge the capacitor in response to an inductive kickback voltage which is generated when the first switch is opened to terminate the passage of current through the primary winding.

Claim 7

The current driver as set forth in claim 4 above, wherein the second voltage source is at ground potential.

Claim 8

The current driver as set forth in claim 4 above, wherein the first and third voltage sources are of the same polarity relative to ground.

Claim 9

The current driver as set forth in claim 4 above, further comprising a first resistance coupled in series with the first switch between the first terminal of the primary winding and the first voltage source.

Claim 10

The current driver as set forth in claim 7 above, further comprising a second resistance coupled in series with the second diode.

Claim 11

The current driver as set forth in claim 8 above, further comprising a third resistance coupled in series with the third switch between the second capacitor terminal and the third voltage source.

Claim 12

The current driver as set forth in claim 4 above, wherein the primary winding contains more turns than the secondary winding.

Claim 13

The current driver as set forth in claim 9 above, wherein the first and third switches are NPN transistors having their base terminals connected to first and third control inputs respectively, and the second switch is a PNP transistor having the base terminal thereof connected to a second control input.

Claim 14

A current driver circuit for driving an inductive load with a greater voltage during a load current rise time period than during a subsequent steady state load current period, the driver circuit comprising a voltage source; a capacitor; circuitry operating in response to memory control signals to selectively couple the voltage source and the capacitor to the load with the capacitor in an initial state of charge in a manner causing the capacitor to discharge and the load to be driven with an initial voltage which decreases in magnitude to a voltage dependent upon the voltage source as the capacitor discharges over a period of time which generally corresponds to a desired load current rise time, the load drive voltage remaining substantially constant for a second period of time following the load current rise time; and a charging circuit coupled to charge the capacitor, the charging circuit utilizing energy stored by the inductive load at a time immediately prior to the termination of load current to charge the capacitor as load current is terminated.

Claim 15

A current driver circuit for driving an inductive load with a greater voltage during a load current rise time period than during a subsequent steady state load current period, the driver circuit comprising a voltage source; a capacitor; circuitry operating in response to memory control signals to selectively couple the voltage source and the capacitor to the load with the capacitor in an initial state of charge in a manner causing the capacitor to discharge and the load to be driven with an initial voltage which decreases in magnitude to a voltage dependent upon the voltage source as the capacitor discharges over a period of time which generally corresponds to a desired load current rise time, the load drive voltage remaining substantially constant for a second period of time following the load current rise time; and a charging circuit coupled to charge the capacitor, the charging circuit utilizing energy stored by the inductive load at a time immediately prior to the termination of load current to charge the capacitor as load current is terminated.

Claim 16

The driver circuit as set forth in claim 12 above, wherein the coupling circuitry includes a transformer having a primary to secondary winding turns ratio greater than one with the capacitor and voltage source being selectively coupled to the primary winding and the secondary winding being coupled to the load.