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US3924319A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of fabricating stepped electrodes

Assignee: AT&T Inc
•
Filing: 1974-08-12
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Granted: 1975-12-09
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Expires: 1994-08-12
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Abstract

Abstract A method of fabricating integrated circuits produces stepped electrodes having a width, W, equal to the minimum desired feature width in a mask. A silicon dioxide layer is formed on a silicon substrate so there are alternating thick and thin silicon dioxide regions of width W to produce a stepped surface. A doped polysilicon layer is formed on the stepped surface. A mask is used to expose channels of width W centered on alternate steps. Etching the exposed channels to the silicon substrate leaves a first set of stepped polysilicon electrodes of width W. Thick silicon dioxide zones are formed on the exposed silicon substrate. Offsetting the mask a smaller distance than W and selectively etching silicon dioxide is used to produce a series of oxide steps between successive polysilicon electrodes. A subsequent metallization on the oxide steps forms a second set of electrodes between the first set of polysilicon electrodes. Using doped polysilicon for the second set of electrodes in combination with a thick field oxide region allows forming an impurity zone in the substrate without a photolithographic step.

Inventors

  • 👤 Amr Mohamed Mohsen

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 20:57
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/482; H10W20/484; H10D; H10D44/00; H10D44/01; H10D44/041; H10D84/00; H10D84/01; H10D84/0198; H10D84/02; H10D84/03; H10D84/038; H10P; H10P95/00

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 194 words
A method of forming a solid state device having multiple level electrodes over a substrate comprising the steps of: forming a first insulating layer disposed on the substrate, the layer having thicker and thinner portions forming a stepped upper surface of a first array of steps, forming a first conducting layer overlying the first insulating layer, selectively etching through the first conducting layer and the first insulating layer to form stepped islands of insulating material overlaid by conducting material having upper and lower levels, and laterally centered about the original location of every other step of the first array in the insulating layer, forming a second insulating layer including forming zones of insulating material on the islands of conducting material and forming stepped zones of insulating material having a second array of steps each located in the area between successive conducting material islands so lower levels of the stepped zones are adjacent to upper levels of the conducting material islands and upper levels of the stepped zones are adjacent to lower levels of the conducting material islands, and depositing a conducting material on the stepped zones of insulating material between the conducting material islands.
Claim 2
Independent Claim 194 words
A method of forming a solid state device having multiple level electrodes over a substrate comprising the steps of: forming a first insulating layer disposed on the substrate, the layer having thicker and thinner portions forming a stepped upper surface of a first array of steps, forming a first conducting layer overlying the first insulating layer, selectively etching through the first conducting layer and the first insulating layer to form stepped islands of insulating material overlaid by conducting material having upper and lower levels, and laterally centered about the original location of every other step of the first array in the insulating layer, forming a second insulating layer including forming zones of insulating material on the islands of conducting material and forming stepped zones of insulating material having a second array of steps each located in the area between successive conducting material islands so lower levels of the stepped zones are adjacent to upper levels of the conducting material islands and upper levels of the stepped zones are adjacent to lower levels of the conducting material islands, and depositing a conducting material on the stepped zones of insulating material between the conducting material islands.
Claim 3
Dependent Claim 68 words
A method as recited in claim 1 wherein forming the first insulating layer comprises the steps of: forming a first an insulating layer of uniform thickness overlying the substrate, selectively etching channels through the said insulating layer of uniform thickness to the substrate, and forming zones of insulating material in the channels on the substrate to a thickness less than that of the insulating layer of uniform thickness.
Claim 4
Dependent Claim 103 words
The method as recited in claim 2 wherein forming the stepped zones of insulating material between successive islands of conducting material comprises: forming a first plurality of zones of insulating material between the islands of conducting material about equal in thickness to the thickest portions of the insulating layer, removing portions of each of the zones of insulating material which portions are adjacent to the upper levels of the islands of conducting material, and forming in the openings so exposed a second plurality of zones of insulating material of a thickness less than that of the first plurality of zones of insulating material.
Claim 5
Dependent Claim 31 words
A method as recited in claim 3 wherein the substrate is silicon, the insulating material is silicon dioxide, the first conducting layer is polysilicon, and the second conducting layer is polysilicon.
Claim 6
Dependent Claim 29 words
A method as recited in claim 4 wherein the channels in the insulating layer are the minimum mask feature width which is less than about 15 microns in width.
Claim 7
Independent Claim 221 words
A method for forming a stepped electrode array for a charge transfer device including the stpes of: oxidizing a silicon substrate to form a silicon dioxide layer overlying the silicon substrate, etching channels of depth D, width W and periodicity 2W through the first silicon dioxide layer to expose strips of width W of the silicon substrate, oxidizing the thus exposed strips of width W of the silicon substrate to form a first plurality of silicon dioxide zones of a thickness less than D so there is an exposed first stepped silicon dioxide layer surface, forming a polysilicon layer on the first stepped silicon dioxide surface, selectively etching the silicon dioxide layer and the polysilicon layer to leave, centered on every other step of the said first stepped silicon dioxide layer, stepped polysilicon electrodes of width W and to expose the silicon substrate in spacings of width W between the polysilicon electrodes, forming silicon dioxide zones on the polysilicon elEctrodes and forming silicon dioxide second stepped zones on the exposed silicon substrate between the polysilicon electrodes, so one portion of each second stepped zone has a thickness approximately equal to D and the other portion of each stepped zone has a thickness less than D, and depositing a conducting material on the second stepped silicon dioxide zones between the polysilicon electrodes.
Claim 8
Independent Claim 221 words
A method for forming a stepped electrode array for a charge transfer device including the stpes of: oxidizing a silicon substrate to form a silicon dioxide layer overlying the silicon substrate, etching channels of depth D, width W and periodicity 2W through the first silicon dioxide layer to expose strips of width W of the silicon substrate, oxidizing the thus exposed strips of width W of the silicon substrate to form a first plurality of silicon dioxide zones of a thickness less than D so there is an exposed first stepped silicon dioxide layer surface, forming a polysilicon layer on the first stepped silicon dioxide surface, selectively etching the silicon dioxide layer and the polysilicon layer to leave, centered on every other step of the said first stepped silicon dioxide layer, stepped polysilicon electrodes of width W and to expose the silicon substrate in spacings of width W between the polysilicon electrodes, forming silicon dioxide zones on the polysilicon elEctrodes and forming silicon dioxide second stepped zones on the exposed silicon substrate between the polysilicon electrodes, so one portion of each second stepped zone has a thickness approximately equal to D and the other portion of each stepped zone has a thickness less than D, and depositing a conducting material on the second stepped silicon dioxide zones between the polysilicon electrodes.
Claim 9
Dependent Claim 169 words
The method as recited in claim 6 wherein forming the silicon dioxide zones on the polysilicon electrodes and forming the second stepped silicon dioxide zones between the polysilicon electrodes comprises the steps of: oxidizing the polysilicon electrodes and the exposed silicon substrate between the polysilicon electrodes to form a silicon dioxide layer of a thickness approximately equal to D, aligning a mask having slots of width W and periodicity 2W to center the slots approximately at the boundaries of the silicon dioxide overlying the silicon substrate between the electrodes and the upper levels of the polysilicon electrodes, selectively etching, through said slots in the mask, the silicon dioxide overlying the upper levels of the polysilicon electrodes and overlying the adjacent halves of the portion of the silicon substrate between the electrodes, to the first underlying silicon and polysilicon surfaces, and oxidizing the exposed silicon and polysilicon surfaces to form silicon dioxide of a thickness less than D thereby forming the second stepped silicon dioxide surfaces between the polysilicon electrodes.
Claim 10
Dependent Claim 46 words
The method as recited in claim 7 wherein forming a polysilicon layer on the first stepped silicon dioxide surface comprises the steps of: depositing a polysilicon layer on the first stepped silicon dioxide surface, and introducing into the polysilicon layer impurities producing a type of semiconductivity.
Claim 11
Dependent Claim 109 words
The method as recited in claim 8 wherein the steps of depositing a conducting material on the second stepped silicon dioxide zones between the polysilicon electrodes comprises the steps of: depositing a polysilicon layer on the silicon dioxide zones overlying the polysilicon electrodes and on the silicon dioxide stepped zones overlying the silicon substrate between the polysilicon electrodes, selectively etching away a portion of the polysilicon layer to expose a silicon dioxide zone above a region in the silicon substrate where an impurity zone is desired, non-selectively etching away the exposed silicon dioxide, and non-selectively introducing conductivity determining impurities into the exposed silicon substrate and the exposed polysilicon layer.
Claim 12
Dependent Claim 15 words
The method as recited in claim 9 wherein the impurities are phosphorous introduced by diffusion.
Claim 13
Dependent Claim 16 words
The method as recited in claim 10 wherein width W is less than about 15 microns.
Claim 14
Dependent Claim 15 words
The method as recited in claim 11 wherein the thickness D is about 3500 Angstroms.
Claim 15
Dependent Claim 17 words
The method as recited in claim 12 wherein the thickness less than D is about 1500 Angstroms.

References Cited (Backward Citations)

US3651349A Cited
US3697786A Cited
US3837907A Cited
US3852799A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-12-08 1979-06-09 1979-12-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-12-08 1983-06-09 1983-12-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-12-08 1987-06-09 1987-12-09 $7700.00 Window Closed / Lapsed

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