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Method and apparatus on in-circuit testing of a group of sequentially-operated system output bistable devices

Assignee: AG Communication Systems Corp
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Filing: 1974-02-27
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Granted: 1975-11-11
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Expires: 1994-02-27
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Abstract

Abstract A method and apparatus of in-circuit testing of bi-stable devices in a system having a sequentially-operated control unit including a sequence state counter for setting and resetting the bi-stable devices, includes advancing the sequence state counter to a sequence state associated with the selected device under test, enabling sequentially the selected device under test to be controlled by the output of the counter, providing a processing unit for determining the proper output condition of the selected device under test and selectively gating subsequently the output of the selected bi-stable device under test to the processing unit to determine whether or not the device under test is operative.

Inventors

  • 👤 Thomas W Crosley
  • 👤 Howard R Miller

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 17:36
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/22; H; H04; H04Q; H04Q3/00; H04Q3/42; H04Q3/54; H04Q3/545; H04Q3/54575; H04Q3/54591

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 112 words
In a system having a sequentially-operated control unit including a group of bi-stable output devices responsive to the outputs of a sequence state counter, a method of in-circuit testing a selected one of the bi-stable devices, comprising: advancing the sequence state counter to a sequence state associated with the selected device under test; enabling subsequently the selected device under test to be controlled by the output of the counter; providing processing means for determining the proper output condition for the selected device under test; and selectively gating subsequently the output of the selected bistable device under test to said processing means to determine whether or not the device under test is operative.
Claim 2
Dependent Claim 112 words
In a system having a sequentially-operated control unit including a group of bi-stable output devices responsive to the outputs of a sequence state counter, a method of in-circuit testing a selected one of the bi-stable devices, comprising: advancing the sequence state counter to a sequence state associated with the selected device under test; enabling subsequently the selected device under test to be controlled by the output of the counter; providing processing means for determining the proper output condition for the selected device under test; and selectively gating subsequently the output of the selected bistable device under test to said processing means to determine whether or not the device under test is operative.
Claim 3
Dependent Claim 117 words
In a system having a sequentially-operated control unit including a group of bi-stable output devices responsive to the outputs of a sequence state counter, an apparatus for incircuit testing a selected one of the bi-stable devices, comprising: means for advancing the sequence state counter to a sequence state associated with the selected device under test; means for enabling subsequently the selected device under test to be controlled by the output of the counter; processing means for determining the proper output condition for the selected device under test; and means for selectively gating subsequently the output of the selected bi-stable device under test to said processing means to determine whether or not the device under test is operative.
Claim 4
Dependent Claim 117 words
In a system having a sequentially-operated control unit including a group of bi-stable output devices responsive to the outputs of a sequence state counter, an apparatus for incircuit testing a selected one of the bi-stable devices, comprising: means for advancing the sequence state counter to a sequence state associated with the selected device under test; means for enabling subsequently the selected device under test to be controlled by the output of the counter; processing means for determining the proper output condition for the selected device under test; and means for selectively gating subsequently the output of the selected bi-stable device under test to said processing means to determine whether or not the device under test is operative.

References Cited (Backward Citations)

US3299220A Cited
US3400229A Cited
US3555410A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-11-10 1979-05-12 1979-11-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-11-10 1983-05-12 1983-11-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-11-10 1987-05-12 1987-11-11 $7700.00 Window Closed / Lapsed

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