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US3911561A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of fabricating an array of semiconductor elements

Assignee: Zyrotron Ind Inc
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Filing: 1974-02-19
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Granted: 1975-10-14
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Expires: 1994-02-19
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Abstract

Abstract The array comprising a metallic base having a high thermal conductivity which receives a first layer of material having a high thermal conductivity and low electrical conductivity. A plurality of semiconductor elements are mounted on the first layer of material in juxtaposition to each other and a second layer of material having the same characteristics as the first layer of material covers the first layer of material and the semiconductor elements. A method of fabricating the array of semiconductor elements also is disclosed.

Inventors

  • 👤 Frederic R Quinn

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 19:16
CPC Classifications
H; H10; H10W; H10W40/00; H10W40/70; H10W90/00

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 115 words
A method of fabricating an array of semiconductor elements comprising providing a metallic base having a high thermal conductivity, coating said base with a first curable layer of material having a low electrical conductivity and a high thermal conductivity, curing said first layer of material, adhesively affixing a plurality of semiconductor elements with a cement of said curable material on said first layer of material in juxtaposition to each other, with the terminals of said plurality of semiconductor elements extending upwardly from said metallic base, coating said plurality of semiconductor elements with a second layer of curable material having a low electrical conductivity and a high thermal conductivity, and curing said second layer of material.
Claim 2
Independent Claim 115 words
A method of fabricating an array of semiconductor elements comprising providing a metallic base having a high thermal conductivity, coating said base with a first curable layer of material having a low electrical conductivity and a high thermal conductivity, curing said first layer of material, adhesively affixing a plurality of semiconductor elements with a cement of said curable material on said first layer of material in juxtaposition to each other, with the terminals of said plurality of semiconductor elements extending upwardly from said metallic base, coating said plurality of semiconductor elements with a second layer of curable material having a low electrical conductivity and a high thermal conductivity, and curing said second layer of material.
Claim 3
Dependent Claim 44 words
The method of claim 1, including the step of cutting a dovetail groove in said metallic base prior to coating said metallic base with said first layer of material, said coating step comprising filling said groove with said first and second layers of material.
Claim 4
Dependent Claim 54 words
The method of claim 2, comprising the steps of providing L-shapeed terminals having horizontal and vertical legs, electrically connecting one end of a semiconductor device to the horizontal leg of a terminal and electrically connecting the other end of the semiconductor device to the horizontal leg of another terminal to provide a semiconductor element.
Claim 5
Dependent Claim 36 words
The method of claim 3, including the step of coating a diode chip with a curable material of low electrical conductivity and a high thermal conductivity to hermetically seal the same to provide said semiconductor device.
Claim 6
Dependent Claim 42 words
The method of claim 3, in which the step of affixing said plurality of semiconductor elements on said first layer of material comprises positioning said terminals connected to a semiconductor device whereby said vertical legs are in opposed relationship to each other.

References Cited (Backward Citations)

US2735050A Cited
US3181229A Cited
US3463970A Cited
US3708722A Cited
US3792525A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-10-13 1979-04-14 1979-10-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-10-13 1983-04-14 1983-10-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-10-13 1987-04-14 1987-10-14 $7700.00 Window Closed / Lapsed

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