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US3909559A Expired / Lapsed US ⏱️ 0.0 years remaining

Electronic hybrid

Assignee: GTE International Inc
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Filing: 1974-04-19
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Granted: 1975-09-30
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Expires: 1994-04-19
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Abstract

Abstract An electronic hybrid circuit is provided for connecting a signal transmitting circuit and a signal receiving circuit to a both-way signal transmission circuit, said circuit comprising a constant current supply source providing current supply terminals for connection to said both-way signal transmission circuits, a transistor, the current path of which is connected across said current supply terminals in series with a line balance load impedance, and a signal summation circuit having inputs connected respectively at opposite sides of the current path of said transistor. The arrangement being such that with a signal receiving circuit connected to provide a control signal to a current control electrode of said transistor, and a signal transmitting circuit connected to receive an output from said signal summation circuit, signal voltages generated across the impedance presented to said supply terminals in response to receipt of signals by said both-way transmission circuit or transmission of signals from said signal receiving circuit are fed to said signal transmitting circuit via said signal summation circuit, the signal voltages generated by said signal receiving circuit being at least partially cancelled in the summation circuit by corresponding signal voltages generated in phase opposition across said line balance load impedance.

Inventors

  • 👤 Michael Geoffrey Cleeve Taylor

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 14:27
CPC Classifications
H; H04; H04B; H04B1/00; H04B1/38; H04B1/40; H04B1/54; H04B1/58; H04B1/586

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 267 words
An electronic hybrid circuit for connecting a signal transmitting circuit and a signal receiving circuit to a two-way signal transmission circuit, said circuit comprising: constant current supply source means for providing current supply terminals for connection to said two-way signal transmission circuit; a signal control transistor, a line balance load impedance connected in series with the current path of said signal control transistor, said current supply terminals connected across the series combination of said signal control transistor current path and said balance impedance; and a signal summation circuit having inputs connected respectively at opposite sides of the current path of said signal control transistor, said signal summation circuit includes a series impedance element in each of said inputs connected respectively at opposite sides of the current path of said signal control transistor and wherein said signal transmitting output of said summation circuit is formed by the junction of said two series impedance elements, the arrangement being such that with a signal receiving circuit connected to provide a control signal to a current control electrode of said transistor, and a signal transmitting circuit connected to receive an output from said signal summation circuit, signal voltages generated across the impedance presented to said supply terminals in response to receipt of signals by said two-way transmission circuit or transmission of signals from said signal receiving circuit are fed to said signal transmitting circuit via said signal summation circuit, the signal voltages generated by said signal receiving circuit being at least partially cancelled in the summation circuit by corresponding signal voltages generated in phase opposition across said line balance load impedance.
Claim 2
Dependent Claim 267 words
An electronic hybrid circuit for connecting a signal transmitting circuit and a signal receiving circuit to a two-way signal transmission circuit, said circuit comprising: constant current supply source means for providing current supply terminals for connection to said two-way signal transmission circuit; a signal control transistor, a line balance load impedance connected in series with the current path of said signal control transistor, said current supply terminals connected across the series combination of said signal control transistor current path and said balance impedance; and a signal summation circuit having inputs connected respectively at opposite sides of the current path of said signal control transistor, said signal summation circuit includes a series impedance element in each of said inputs connected respectively at opposite sides of the current path of said signal control transistor and wherein said signal transmitting output of said summation circuit is formed by the junction of said two series impedance elements, the arrangement being such that with a signal receiving circuit connected to provide a control signal to a current control electrode of said transistor, and a signal transmitting circuit connected to receive an output from said signal summation circuit, signal voltages generated across the impedance presented to said supply terminals in response to receipt of signals by said two-way transmission circuit or transmission of signals from said signal receiving circuit are fed to said signal transmitting circuit via said signal summation circuit, the signal voltages generated by said signal receiving circuit being at least partially cancelled in the summation circuit by corresponding signal voltages generated in phase opposition across said line balance load impedance.
Claim 3
Dependent Claim 56 words
A circuit as claimed in claim 1, wherein said signal receiving circuit is connected to provide a control signal to a current control electrode of said signal control transistor, and a signal transmitting circuit is connected to receive an output from said signal summation circuit, said signal receiving and transmitting circuits each including a signal amplifier.
Claim 4
Dependent Claim 18 words
A circuit as claimed in claim 2, wherein said signal amplifiers include means to adjust their gain characteristics.
Claim 5
Dependent Claim 30 words
A circuit as claimed in claim 1, wherein the current path of said signal control transistor is formed by a collector and an emitter electroDe of said signal control transistor.
Claim 6
Dependent Claim 21 words
A circuit as claimed in claim 4, wherein the current control electrode is a base electrode of said signal control transistor.
Claim 7
Dependent Claim 72 words
A circuit as claimed in claim 1, wherein a plurality of said hybrid circuits are interconnected by means of a first terminal of a two-way line pair being connected to each of the other first terminals of said hybrid circuits and a suitable impedance network being connected between said common interconnection point and a reference point common to the second terminals of said line pairs of said two-way line signal transmission path.

References Cited (Backward Citations)

US3060265A Cited
US3180947A Cited
US3530260A Cited
US3480742A Cited
US3700831A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-09-29 1979-03-31 1979-09-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-09-29 1983-03-31 1983-09-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-09-29 1987-03-31 1987-09-30 $7700.00 Window Closed / Lapsed

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