Abstract In a digital circuit for providing an output signal at a boosted level in respect to an input signal, the source-drain circuit of a MIS field effect transistor is connected between input and output terminals and the gate of such transistor is supplied with a first clock pulse during the occurrence of the input signal, and a semiconductor substrate of one conductivity type is connected to ground and has first and second diffusion regions of the opposite conductivity type formed therein with a relatively small interval between such regions and with the second diffusion region being in the floating state, that is, devoid of any ohmic connections thereto. An insulating layer on the substrate extends from over a part of the first diffusion region over substantially the entire area of the second diffusion region and the interval therebetween and a conductive layer connected to the output terminal covers the insulating layer for forming a capacitance with the latter, and a second clock pulse which is sufficiently out of phase in respect of the first clock pulse to avoid overlapping thereof is applied to the first diffusion region so that a portion of an output signal derived at the output terminal has its level boosted in respect of an input signal applied to the input terminal by the magnitude of the second clock pulse with the pulse width of such portion being determined by the time interval from the second clock pulse to the first clock pulse.
A digital circuit for providing an output signal at a boosted level with respect to an input signal, comprising input and output terminals for respectively receiving the input signal and delivering the output signal, a MIS field effect transistor having a source-drain circuit connected between said input and output terminals, means for supplying a first clock pulse to the gate electrode of said MIS field effect transistor during the occururence of said input signal, a semicondcutor substrate of one conductivity type connected to ground, first and second diffusion regions of the opposite conductivity type formed in said substrate with a relatively small interval between said regions and with said second diffusion region being in an electrically floating state, an insulating layer on said substrate extending from over a part of said first diffusion region and over substantially the entire area of said second diffusion region and said interval, a conductive layer covering said insulating layer for forming a capacitance with the latter, means connecting said conductive layer to said output terminal, and means for supplying a second clock pulse to said first diffusion region, said first and second clock pulses being sufficiently different in phase to avoid overlapping thereof and the time interval from said second clock pulse to said first clock pulse determining the pulse width of a portion of said output signal, which is boosted with respect to said input signal by the magnitude of said second clock pulse.
Claim 2
Dependent Claim
241 words
A digital circuit for providing an output signal at a boosted level with respect to an input signal, comprising input and output terminals for respectively receiving the input signal and delivering the output signal, a MIS field effect transistor having a source-drain circuit connected between said input and output terminals, means for supplying a first clock pulse to the gate electrode of said MIS field effect transistor during the occururence of said input signal, a semicondcutor substrate of one conductivity type connected to ground, first and second diffusion regions of the opposite conductivity type formed in said substrate with a relatively small interval between said regions and with said second diffusion region being in an electrically floating state, an insulating layer on said substrate extending from over a part of said first diffusion region and over substantially the entire area of said second diffusion region and said interval, a conductive layer covering said insulating layer for forming a capacitance with the latter, means connecting said conductive layer to said output terminal, and means for supplying a second clock pulse to said first diffusion region, said first and second clock pulses being sufficiently different in phase to avoid overlapping thereof and the time interval from said second clock pulse to said first clock pulse determining the pulse width of a portion of said output signal, which is boosted with respect to said input signal by the magnitude of said second clock pulse.
Claim 3
Dependent Claim
29 words
A digital circuit according to claim 1; in which the source and drain of said MIS field effect transistor are constituted by additional diffusison regions formed in said substrate.