US3900719A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Hybrid arithmetic device
Assignee: Ricoh Co Ltd
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Filing: 1973-04-27
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Granted: 1975-08-19
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Expires: 1993-04-27
Abstract
Abstract A hybrid arithmetic device is disclosed in which a load is connected to a constant current or voltage source, and the resistances of the load and a resistor which determines the constant current or voltage of the constant current or voltage source are varied in response to coded signals representing decimal digits. The result of multiplication or division of two decimal operands may be detected as a voltage across or current flowing through the load resistor.
Inventors
- 👤 Satoshi Yamauchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 22:05
CPC Classifications
G; G06; G06J; G06J1/00
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
259 words
A hybrid arithmetic, device comprising: a first stage including a first resistor, a Zener diode connected to said first resistor, a first transistor amplifier having an output and an input, second and third resistors connected to the output of said first transistor amplifier, a first operational amplifier having a plurality of inputs and an output, the output thereof being connected to the input of said first transistor amplifier, one of said inputs of said first operational amplifier being connected to the point of interconnection between said Zener diode and said first resistor, the other input of said first operational amplifier being connected to a feedback path from the output of said first transistor amplifier; a second stage including a second transistor amplifier having an input and an output, fourth and fifth resistors connected to the output of said second transistor amplifier, a second operational amplifier having a plurality of inputs and an output, the output of said second operational amplifier being connected to the input of said second transistor amplifier, one of the inputs of said second operational amplifier being connected to the output of said first transistor amplifier and the other input thereof being connected to a feedback path from the output of said second transistor amplifier; means for setting the values of at least a selected pair of said resistors to selected digital values representing the values of arithmetic operands so as to derive across the fifth resistor an output voltage whose value is a measure of the result of a selected arithmetic operation on said operands.
Claim 2
Dependent Claim
259 words
A hybrid arithmetic, device comprising: a first stage including a first resistor, a Zener diode connected to said first resistor, a first transistor amplifier having an output and an input, second and third resistors connected to the output of said first transistor amplifier, a first operational amplifier having a plurality of inputs and an output, the output thereof being connected to the input of said first transistor amplifier, one of said inputs of said first operational amplifier being connected to the point of interconnection between said Zener diode and said first resistor, the other input of said first operational amplifier being connected to a feedback path from the output of said first transistor amplifier; a second stage including a second transistor amplifier having an input and an output, fourth and fifth resistors connected to the output of said second transistor amplifier, a second operational amplifier having a plurality of inputs and an output, the output of said second operational amplifier being connected to the input of said second transistor amplifier, one of the inputs of said second operational amplifier being connected to the output of said first transistor amplifier and the other input thereof being connected to a feedback path from the output of said second transistor amplifier; means for setting the values of at least a selected pair of said resistors to selected digital values representing the values of arithmetic operands so as to derive across the fifth resistor an output voltage whose value is a measure of the result of a selected arithmetic operation on said operands.
Claim 3
Dependent Claim
47 words
A hybrid arithmetic device as defined in claim 1, in which the second and the fifth, output resistor are set to the values of a multiplicand and a multiplier, respectively, and the value of the output voltage is proportional to the product of said multiplicand and multiplier.
Claim 4
Dependent Claim
46 words
A hybrid arithmetic device as defined in claim 1, in which the third and fifth resistor are set respectively to the values of a divisor and a dividend, respectively, and the value of the output voltage is proportional to the quotient of said dividend and divisor.
Claim 5
Dependent Claim
32 words
A hybrid arithmetic device as defined in claim 1, in which the setting means comprise digital-to-analog converter means for converting the value of a selected digital quantity into an analog resistance value.
Claim 6
Dependent Claim
78 words
A hybrid arithmetic device as defined in claim 1, in which a plurality of additional staGes, substantially identical to said second stage, are connected in parallel to the output of said second transistor amplifier, a resistor in each of said additional stages being representative of a particular dividend in relationship to a common divisor represented by said second resistor, another resistor in each of said additional stages being representative of a particular quotient resulting from the dividing operation.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-08-18 | 1979-02-17 | 1979-08-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-08-18 | 1983-02-17 | 1983-08-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-08-18 | 1987-02-17 | 1987-08-19 | $7700.00 | Window Closed / Lapsed |