US3900351A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of producing semiconductor integrated circuits with improved isolation structure
Assignee: NEC Corp
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Filing: 1973-11-21
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Granted: 1975-08-19
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Expires: 1993-11-21
Abstract
Abstract A semiconductor integrated circuit is fabricated by forming separated highly doped regions on the surface of a semiconductor and depositing a semiconductor layer on that surface. Circuit elements are formed in the layer above each of the highly doped regions, and a selected impurity is diffused through the substrate into the regions between the circuit elements. The impurity promotes conductivity of the type opposite that of the semiconductor layer.
Inventors
- 👤 Masashi Mukogawa
- 👤 Takashi Takagaki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 22:48
CPC Classifications
H; H10; H10P; H10P95/00; H10W; H10W10/00; H10W10/01; H10W10/031; H10W10/30; H10W15/00; H10W15/01; Y; Y10; Y10S; Y10S148/00; Y10S148/062; Y10S148/085; Y10S438/00; Y10S438/914; Y10S438/917; Y10S438/928
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
136 words
A METHOD OF PRODUCING A SEMICONDUCTOR INTEGRATED CIRCUIT COMPRISING THE STEPS OF FORMING HIGHLY DOPED REGIONS SEPARATED FROM EACH OTHER ON THE SURFACE OF A SEMICONDUCTOR SUBSTRATE, DEPOSITING A SEMICONDUCTOR LAYER ON SAID SURFACE, FORMING CIRCUIT ELEMENTS IN SAID SEMICONDUCTOR LAYER ABOVE EACH OF SAID HIGHLY DOPED REGIONS AND THEREAFTER DIFFUSING A SELECTED IMPURITY THROUGH SAID SEMICONDUCTOR SUBSTRATE FROM THE ENTIRE BACK SURFACE THEREOF AND INTO REGIONS OF SAID SEMICONDUCTOR LAYER BETWEEN SAID CIRCUIT ELEMENTS BY USING THE MASKING ACTION OF SAID HIGHLY DOPED REGIONS, THEREBY FORMING HIGH-RESISTIVITY REGIONS BETWEEN SAID CIRCUIT ELEMENTS IN SAID SEMICONDUCTOR LAYER, SAID HIGH-RESISTIVITY REGIONS BEING SUFFICIENTLY HIGH TO EFFECT ELECTRICAL ISOLATION BETWEEN SAID CIRCUIT ELEMENTS, WHEREIN SAID IMPURITY HAS A HIGH DIFFUSION COEFFICIENT IN SAID SEMICONDUCTOR SUBSTRATE AND PROMOTES CONDUCTIVITY OF A TYPE OPPOSITE TO THAT OF SAID SEMICONDUCTOR LAYER.
Claim 2
Independent Claim
136 words
A METHOD OF PRODUCING A SEMICONDUCTOR INTEGRATED CIRCUIT COMPRISING THE STEPS OF FORMING HIGHLY DOPED REGIONS SEPARATED FROM EACH OTHER ON THE SURFACE OF A SEMICONDUCTOR SUBSTRATE, DEPOSITING A SEMICONDUCTOR LAYER ON SAID SURFACE, FORMING CIRCUIT ELEMENTS IN SAID SEMICONDUCTOR LAYER ABOVE EACH OF SAID HIGHLY DOPED REGIONS AND THEREAFTER DIFFUSING A SELECTED IMPURITY THROUGH SAID SEMICONDUCTOR SUBSTRATE FROM THE ENTIRE BACK SURFACE THEREOF AND INTO REGIONS OF SAID SEMICONDUCTOR LAYER BETWEEN SAID CIRCUIT ELEMENTS BY USING THE MASKING ACTION OF SAID HIGHLY DOPED REGIONS, THEREBY FORMING HIGH-RESISTIVITY REGIONS BETWEEN SAID CIRCUIT ELEMENTS IN SAID SEMICONDUCTOR LAYER, SAID HIGH-RESISTIVITY REGIONS BEING SUFFICIENTLY HIGH TO EFFECT ELECTRICAL ISOLATION BETWEEN SAID CIRCUIT ELEMENTS, WHEREIN SAID IMPURITY HAS A HIGH DIFFUSION COEFFICIENT IN SAID SEMICONDUCTOR SUBSTRATE AND PROMOTES CONDUCTIVITY OF A TYPE OPPOSITE TO THAT OF SAID SEMICONDUCTOR LAYER.
Claim 3
Dependent Claim
27 words
The method of producing a semiconductor integrated circuit set forth in claim 1, wherein said semiconductor layer is formed of silicon and wherein said impurity is gold.
Claim 4
Dependent Claim
29 words
The method of producing a semiconductor integrated circuit set forth in claim 2, wherein the concentration of said gold in said semiconductor layer is between 1014 and 1016 atoms/cm3.
Claim 5
Dependent Claim
26 words
The method of producing a semiconductor integrated circuit set forth in claim 1, wherein said semiconductor layer is formed of germanium and said impurity is copper.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-08-18 | 1979-02-17 | 1979-08-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-08-18 | 1983-02-17 | 1983-08-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-08-18 | 1987-02-17 | 1987-08-19 | $7700.00 | Window Closed / Lapsed |