Abstract Serial three point discrete fourier transform apparatus is disclosed. The apparatus includes a summing circuit, a differencing circuit and a pair of storing means. A first digital sample is combined with a second succeeding digital sample in the summing and differencing circuits. The combined signals are stored in different ones of the pair of storage means. A third succeeding digital sample is combined in the summing circuit with the stored sum signal to produce a signal representative of one of the terms in the Fourier transform, and in the differencing circuit to produce an intermediate signal. The intermediate signal is stored in one of the pair of storage means and combined with the stored difference signal in the summing and differencing circuits to produce signals representative of the second and third terms of the Fourier transform.
Digital data processing apparatus comprising: commutating means having a plurality of inputs, one thereof being coupled to a source of digital samples; an arithmetic unit having a pair of outputs, a first one thereof being coupled to one of the plurality of inputs; a pair of storage means, a first one thereof being coupled between the commutating means and the arithmetic uNit and a second one thereof being coupled between a second one of the pair of outputs and one of the plurality of inputs, and, wherein the arithmetic unit includes: a summing circuit coupled between the first one of the pair of storage means and the first one of the pair of outputs; and a differencing circuit coupled between the first one of the pair of storage means and the second one of the pair of storage means.
Claim 2
Dependent Claim
139 words
Digital data processing apparatus comprising: commutating means having a plurality of inputs, one thereof being coupled to a source of digital samples; an arithmetic unit having a pair of outputs, a first one thereof being coupled to one of the plurality of inputs; a pair of storage means, a first one thereof being coupled between the commutating means and the arithmetic uNit and a second one thereof being coupled between a second one of the pair of outputs and one of the plurality of inputs, and, wherein the arithmetic unit includes: a summing circuit coupled between the first one of the pair of storage means and the first one of the pair of outputs; and a differencing circuit coupled between the first one of the pair of storage means and the second one of the pair of storage means.
Claim 3
Dependent Claim
26 words
The apparatus recited in claim 1 including additionally a multiplier couped between the differencing circuit and one of the plurality of inputs of the commutating means.