US3898559A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method and apparatus for testing transistors
Assignee: Sencore Inc
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Filing: 1973-02-05
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Granted: 1975-08-05
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Expires: 1993-02-05
Abstract
Abstract Bipolar and field effect transistors are tested by means of a single circuit employing an exclusive-or logic block which provides an output signal when the collector signal is out of phase with the base signal on a bipolar transistor or when the drain signal is out of phase with the gate signal on a field effect transistor.
Inventors
- 👤 Marlin D Westra
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 22:25
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/26; G01R31/2607; G01R31/2608
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
145 words
A circuit for testing bipolar and field effect transistors, comprising a first terminal connector for connection to the collector of a bipolar transistor or to the drain of a field effect transistor, a second terminal connector for connection to the base of a bipolar transistor or to the gate of a field effect transistor, a third terminal connector for connection to the emitter of a bipolar transistor or to the source of a field effect transistor, an oscillator having an a square wave output, means coupling the output of said oscillator to said second terminal connector, and means including an exclusive-or logic gate responsive to the relative phase relationship of the A.C. signals at said first and second terminal connectors to indicate when said signals are 180* out-of-phase, thereby to signify that an operative bipolar or field effect transistor is connected to said terminal connectors.
Claim 2
Dependent Claim
145 words
A circuit for testing bipolar and field effect transistors, comprising a first terminal connector for connection to the collector of a bipolar transistor or to the drain of a field effect transistor, a second terminal connector for connection to the base of a bipolar transistor or to the gate of a field effect transistor, a third terminal connector for connection to the emitter of a bipolar transistor or to the source of a field effect transistor, an oscillator having an a square wave output, means coupling the output of said oscillator to said second terminal connector, and means including an exclusive-or logic gate responsive to the relative phase relationship of the A.C. signals at said first and second terminal connectors to indicate when said signals are 180* out-of-phase, thereby to signify that an operative bipolar or field effect transistor is connected to said terminal connectors.
Claim 3
Dependent Claim
51 words
A circuit according to claim 1 wherein said last named means comprises first and second amplifiers each having an input connected to a respective one of said first and second terminal connectorS, and said an exclusive-or logic gate has a pair of inputs respectively coupled to the outputs of said amplifiers.
Claim 4
Dependent Claim
24 words
A circuit according to claim 1, comprising means coupling an in-phase portion of said square wave output of said oscillator to first terminal connector.
Claim 5
Independent Claim
78 words
A method of testing a transistor comprising the steps of applying a square wave drive signal to one electrode of said transistor to develop on another electrode of said transistor a second signal having a frequency equal to that of said drive signal and 180* out-of-phase therewith when said transistor is operative, and utilizing a logic circuit to detect the 180* phase shift between said drive signal and said second signal to indicate that the transistor is operative.
Claim 6
Independent Claim
78 words
A method of testing a transistor comprising the steps of applying a square wave drive signal to one electrode of said transistor to develop on another electrode of said transistor a second signal having a frequency equal to that of said drive signal and 180* out-of-phase therewith when said transistor is operative, and utilizing a logic circuit to detect the 180* phase shift between said drive signal and said second signal to indicate that the transistor is operative.
Claim 7
Dependent Claim
15 words
A method according to claim 4 wherein said logic circuit is an exclusive-or logic circuit.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-08-04 | 1979-02-03 | 1979-08-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-08-04 | 1983-02-03 | 1983-08-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-08-04 | 1987-02-03 | 1987-08-05 | $7700.00 | Window Closed / Lapsed |