US3671876A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Pulse-phase comparators
Assignee: Individual
•
Filing: 1971-01-19
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Granted: 1972-06-20
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Expires: 1991-01-19
Abstract
Abstract The device disclosed herein is a pulse-phase comparator of a digital nature possessing a high degree of noise immunity due to the complete absence of triggerable elements such as binaries or one-shoe multivibrators, and featuring a mode of operation wherein a null output is defined by a corresponding in-phase condition of the compared input signals by virtue of the insertion of additional and externally-generated pulse signals whose fundamental-frequency and phasing character bears a fixed relationship to that of one of the compared signals.
Inventors
- 👤 George S Oshiro
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 12:28
CPC Classifications
H; H03; H03D; H03D13/00; H03D13/001; H03D13/002; H03D13/003; H03D13/004
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
164 words
A noise-free pulse-phase comparator comprising a first logic gating means responsive to a first input signal of variable phase and a second signal of reference phase for producing a series of output pulses whose pulse widths represent the phase difference between said first and second inputs; first and second complementary, externally-generated trains of pulses having a fundamental frequency a fixed integral multiple to said second input signal and a phase a fixed relation to said second input signal; second logic gating means connected and responsive to said series of output pulses and said first and second trains for producing first and second outputs representing the time coincidence of said output pulse series and respectively said first and second trains of pulses whereby the phase difference and the phase difference polarity of said first and second inputs are provided; and circuit means connected and responsive to said first and second outputs for producing a single output indicative of said phase difference and its said polarity.
Claim 2
Dependent Claim
164 words
A noise-free pulse-phase comparator comprising a first logic gating means responsive to a first input signal of variable phase and a second signal of reference phase for producing a series of output pulses whose pulse widths represent the phase difference between said first and second inputs; first and second complementary, externally-generated trains of pulses having a fundamental frequency a fixed integral multiple to said second input signal and a phase a fixed relation to said second input signal; second logic gating means connected and responsive to said series of output pulses and said first and second trains for producing first and second outputs representing the time coincidence of said output pulse series and respectively said first and second trains of pulses whereby the phase difference and the phase difference polarity of said first and second inputs are provided; and circuit means connected and responsive to said first and second outputs for producing a single output indicative of said phase difference and its said polarity.
Claim 3
Dependent Claim
16 words
A pulse-phase comparator as defined in claim 1 wherein said circuit means includes a bi-directional counter.
Claim 4
Dependent Claim
105 words
A pulse-phase comparator as defined in claim 1 wherein said first logic gating means comprises an EXCLUSIVE-OR gate and said second logic gating means comprises two NAND gates, said NAND gates connected and responsive to said series of output pulses, first of said NAND gates further connected and responsive to said first train, said first train comprising pulses whose positive-going edges coincide periodically with the positive-going edges of said second input signal, and second of said NAND gates further connected and responsive to said second train, said second train comprising pulses whose negative-going edges coincide periodically with the positive-going edges of said second input signal.
Claim 5
Dependent Claim
105 words
A pulse-phase comparator as defined in claim 1 wherein said first logic gating means comprises an EXCLUSIVE-NOR gate and said second logic gating means comprises two AND gates, said AND gates connected and responsive to said series of output pulses, first of said AND gates further connected and responsive to said first train, said first train comprising pulses whose positive-going edges coincide periodically with the positive-going edges of said second input signal, and second of said AND gates further connected and responsive to said second train, said second train comprising pulses whose negative-going edges coincide periodically with the positive-going edges of said second input signal.
Claim 6
Dependent Claim
16 words
A pulse-phase comparator as defined in claim 1 wherein said circuit means includes a differential amplifier.
Claim 7
Dependent Claim
15 words
A pulse-phase comparator as defined in claim 1 wherein said circuit means includes filtering means.
Claim 8
Dependent Claim
25 words
In the pulse-phase comparator of claim 3, the addition of inverting means connected and responsive to said first and second outputs from said NAND gates.
Claim 9
Dependent Claim
25 words
In the pulse-phase comparator of claim 4, the addition of inverting means connected and responsive to said first and second outputs from said AND gates.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-06-20 | 1975-12-20 | 1976-06-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-06-20 | 1979-12-20 | 1980-06-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-06-20 | 1983-12-20 | 1984-06-20 | $7700.00 | Window Closed / Lapsed |