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US3896378A Expired / Lapsed US ⏱️ 0.0 years remaining

Apparatus for the measurement of short time intervals

Assignee: Ferranti International PLC
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Filing: 1973-10-26
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Granted: 1975-07-22
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Expires: 1993-10-26
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Abstract

Abstract Apparatus for measuring very short time delays in semiconductor circuits includes two signal sources arranged so that one signal may be delayed relative to the other. The input signals are applied to the circuit under test, and control means are provided to vary the relative time delay until the test circuit reaches a critical state indicative of the time delay to be measured.

Inventors

  • 👤 John Bedford

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 08:21
CPC Classifications
G; G04; G04F; G04F10/00

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 136 words
Apparatus for the measurement of short time intervals representing the inherent time delays in semiconductor circuits, comprising two signals sources operable to apply input signals to a circuit under test, time delay means operable to apply a time delay to one of said two input signals relative to the other of said two input signals, control means operable to sample the output of the circuit under test at a rate not greater than the repetition rate of the input signals and to develop an output for varying the time delay inserted by said time delay means in a manner determined by the said output, display means operable to indicate the duration of the inserted time delay in response to said output and means for applying the output of said control means to said time delay means.
Claim 2
Dependent Claim 136 words
Apparatus for the measurement of short time intervals representing the inherent time delays in semiconductor circuits, comprising two signals sources operable to apply input signals to a circuit under test, time delay means operable to apply a time delay to one of said two input signals relative to the other of said two input signals, control means operable to sample the output of the circuit under test at a rate not greater than the repetition rate of the input signals and to develop an output for varying the time delay inserted by said time delay means in a manner determined by the said output, display means operable to indicate the duration of the inserted time delay in response to said output and means for applying the output of said control means to said time delay means.
Claim 3
Dependent Claim 62 words
Apparatus as claimed in claim 1 in which the time delay means includes a fixed time delay unit having an input connected to one of said two signal sources and a variable time delay unit having an input connected to the other signal source, the outputs of said fixed and said variable time delay units being connected to the circuit under test.
Claim 4
Dependent Claim 36 words
Apparatus as claimed in claim 2 in which the variable time delay unit comprises a triggerable ramp generator and a variable-threshold discriminator the threshold level of which is controlled by the output of the control means.
Claim 5
Dependent Claim 44 words
Apparatus as claimed in claim 3 in which the control means includes a strobe discriminator operable to sample the output of the circuit under test and a third signal source operable to apply a strobe signal to said strobe discriminator for sampling said output.
Claim 6
Dependent Claim 32 words
Apparatus as claimed in claim 4 in which the control means is responsive to changes in the output of the circuit under test to vary the threshold level of the variable-threshold discRiminator.
Claim 7
Dependent Claim 33 words
Apparatus as claimed in claim 5 in which the control means includes means for generating a digital signal which is passed over a digital highway to an input of the variable threshold discriminator.
Claim 8
Dependent Claim 23 words
Apparatus as claimed in claim 6 in which the display means is controlled by the digital signal appearing on the said digital highway.
Claim 9
Dependent Claim 125 words
Apparatus for the measurement of short time intervals representing the inherent time delays in semiconductor circuits, comprising means for applying first and second input signals to a circuit under test, time delay means operable to delay one of said two input signals relative to the other input signals, control means operable to sample the output of the circuit under test at a rate not greater than the repetition rate of the input signals and to vary the time delay inserted by the time delay means in a manner determined by the said output, and means operable to indicate the duration of the inserted time delay in response to said output and means for applying the output of said control means to said time delay means.
Claim 10
Dependent Claim 125 words
Apparatus for the measurement of short time intervals representing the inherent time delays in semiconductor circuits, comprising means for applying first and second input signals to a circuit under test, time delay means operable to delay one of said two input signals relative to the other input signals, control means operable to sample the output of the circuit under test at a rate not greater than the repetition rate of the input signals and to vary the time delay inserted by the time delay means in a manner determined by the said output, and means operable to indicate the duration of the inserted time delay in response to said output and means for applying the output of said control means to said time delay means.
Claim 11
Dependent Claim 67 words
Apparatus as claimed in claim 8 in which the time delay means includes a fixed time delay unit having an input connected to receive one of said first and second input signals and a variable time delay unit having an input connected to receive the other of said first and second input signals, each said time delay unit having an output applied to the circuit under test.
Claim 12
Dependent Claim 61 words
Apparatus as claimed in claim 9 in which the variable time delay unit comprises a triggerable ramp generator and a variable-threshold discriminator, said variable-threshold generator having a first input connected to receive the output of said ramp generator and a second input connected to receive an output of the control means to thereby control the threshold level of said ramp generator.
Claim 13
Dependent Claim 37 words
Apparatus as claimed in claim 9 in which the control means includes a strobe discriminator operable to sample the output of the circuit under test in response to a third input signal applied to said strobe discriminator.
Claim 14
Dependent Claim 29 words
Apparatus as claimed in claim 9 including means for gating the outputs of the delay units and applying the output of said gating means to the circuit under test.

References Cited (Backward Citations)

US2947943A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-07-21 1979-01-20 1979-07-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-07-21 1983-01-20 1983-07-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-07-21 1987-01-20 1987-07-22 $7700.00 Window Closed / Lapsed

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