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US3893071A
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Multi level error correction system for high density memory
Assignee: International Business Machines Corp
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Filing: 1974-08-19
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Granted: 1975-07-01
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Expires: 1994-08-19
Abstract
Abstract This specification describes an error correction system for a high density memory made up of a number of monolithic wafers each containing a plurality of arrays that are addressed thru circuitry and wiring contained on that wafer. The storage bits on the wafers are functionally divided into a number of blocks each containing a plurality of words. The words of each block are on several wafers with each word made up of a plurality of arrays on a single array wafer. Each word in a block is protected by a similar error correction double multiple error detection code. The block is further protected by two additional check words made up using a b-adjacent code. Each byte in the check words protects one byte position of the words of the block. When a single error is detected in any word by the SEC-MED code the code corrects the error. If a multiple error is detected, the multiple error signal points to the word in error to be corrected by the b-adjacent code check words.
Inventors
- 👤 Douglas C Bossen
- 👤 Mu-Yue Hsiao
- 👤 Arvin M Patel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 15:21
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/07; G06F11/08; G06F11/10; G06F11/1008; G06F11/1012; G06F11/1028
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
356 words
In a random access memory system of the type that is functionally divided into units of storage each containing a plurality of data words with each word storing a number of bits of different arrays, an error correcting system comprising: a first level error correction means including a SEC-MED code means adding a plurality of check bits to each data word in and out of storage to form a SEC-MED code word for correcting a single bit in error of each of the SEC-MED code words generated from the plurality of data words in the unit of storage on a word for word basis and providing a pointer for each SEC-MED code in the unit of storage containing more than one error; second and third level error correction means adding additional code words to the units of storage for protecting said SEC-MED code words of the unit of storage on a cross word basis each byte of both additional code words being a check on one byte position in all of the words in the plurality of words, where each check byte of the first additional code word Bp,1 Ap, 1+Ap,2+Ap,3+ . . . +ApM and each check byte of the second additional code word Bp,2 T Ap,1+T2 Ap,2+T3 Ap,3+ . . . +TM Ap,M; second level accumulator level means for generating the syndrome Sp,1 Bp,2+T Ap,1+T2 Ap,2+ . . . +TM Ap,M for each data byte position in the SEC-MED code words of the unit of storage while the first level error corrector is correcting single errors in the words; third level accumulating means for generating the syndrome Sp,2 Bp,2+T Ap,1+T2 Ap,2+ . . . +TM Ap,M for each data byte position in the SEC-MED code words of the unit of storage while the first level corrector is correcting single errors in the syndrome, and, second and third level error correction means for correcting words containing multiple errors using the syndromes generated by the first and second level accumulator means and the pointers generated in the first level error correction means after the first level error correction means has corrected those words containing single errors.
Claim 2
Dependent Claim
356 words
In a random access memory system of the type that is functionally divided into units of storage each containing a plurality of data words with each word storing a number of bits of different arrays, an error correcting system comprising: a first level error correction means including a SEC-MED code means adding a plurality of check bits to each data word in and out of storage to form a SEC-MED code word for correcting a single bit in error of each of the SEC-MED code words generated from the plurality of data words in the unit of storage on a word for word basis and providing a pointer for each SEC-MED code in the unit of storage containing more than one error; second and third level error correction means adding additional code words to the units of storage for protecting said SEC-MED code words of the unit of storage on a cross word basis each byte of both additional code words being a check on one byte position in all of the words in the plurality of words, where each check byte of the first additional code word Bp,1 Ap, 1+Ap,2+Ap,3+ . . . +ApM and each check byte of the second additional code word Bp,2 T Ap,1+T2 Ap,2+T3 Ap,3+ . . . +TM Ap,M; second level accumulator level means for generating the syndrome Sp,1 Bp,2+T Ap,1+T2 Ap,2+ . . . +TM Ap,M for each data byte position in the SEC-MED code words of the unit of storage while the first level error corrector is correcting single errors in the words; third level accumulating means for generating the syndrome Sp,2 Bp,2+T Ap,1+T2 Ap,2+ . . . +TM Ap,M for each data byte position in the SEC-MED code words of the unit of storage while the first level corrector is correcting single errors in the syndrome, and, second and third level error correction means for correcting words containing multiple errors using the syndromes generated by the first and second level accumulator means and the pointers generated in the first level error correction means after the first level error correction means has corrected those words containing single errors.
Claim 3
Dependent Claim
17 words
The error correcting system of claim 1 wherein said SEC-MED code is a Hamming distance 5 code.
Claim 4
Dependent Claim
42 words
The error correcting system of claim 1 wherein said second and third level error correction means and said second and third level accumulator means includes means for generating correction bits and syndrome bits for the check bits in the SEC-MED code words.
Claim 5
Dependent Claim
23 words
The error cOrrecting system of claim 1 wherein said error correction code words are stored in different arrays than the SEC-MED code words.
Claim 6
Dependent Claim
31 words
The error correcting system of claim 1 wherein said check bits of the SEC-MED code words are stored in the same arrays as the data bits of the SEC-MED code words.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-06-30 | 1978-12-30 | 1979-07-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-06-30 | 1982-12-30 | 1983-07-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-06-30 | 1986-12-30 | 1987-07-01 | $7700.00 | Window Closed / Lapsed |