Serial data multiplexing apparatus

Claim 1

Apparatus for sampling digital data bits on a plurality of lines wherein the data bits are supplied at at least two different rates comprising, in combination: a plurality of digital data source means some of which supply data at different rates; means for supplying a clock signal in conjunction with each data bit; multiplexing means connected to each of said aforenamed means for receiving data and clock signals therefrom, said multiplexing means completing a cycle of sampling all of said data sources in a predetermined order in no greater time than the bit period of the highest rate data source means; resettable data indication means for providing an indication of receipt of a clock signal in conjunction with a data bit; scratch pad memory means for supplying and receiving data words in different locations in accordance with said predetermined order; word assembly means, connected to said multiplexing means, said data indication means and said scratch pad means, for retrieving data words as assembled to date from said scratch pad memory means in said predetermined order; means, forming a part of said word assembly means, for updating the retrieved word with a further data bit when same is received concurrently with an indication of receipt of a clock signal by the apparatus; means, forming a part of said word assembly means, for resetting said data indication means to a clock signal not received condition and for returning the updated word to the location in said scratch pad memory from which it was retrieved; and output means connected for receiving said data word after it is completely assembled in said word assembly means.