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US3890698A Expired / Lapsed US ⏱️ 0.0 years remaining

Field shaping layer for high voltage semiconductors

Assignee: Motorola Solutions Inc
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Filing: 1973-12-03
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Granted: 1975-06-24
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Expires: 1993-12-03
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Abstract

Abstract There is disclosed a resistive film having inhomogeneous properties overlaying the passivation layer normally used between the central metal overlay and a guard ring structure of a high power semiconducting device for providing a uniform field distribution between the guard ring and the metal overlay. The resistive film counteracts the effects of charge resulting from finite semiconductor doping and surface contaminants on the passivation film to reduce peak fields when high voltages are applied across the device. Non-uniformities are introduced in the resistive film in the form of high resistivity voids or low resistivity doped areas to counteract the non-uniform field distribution in the film caused by the difference in the radius of curvatures of the central metal overlay and the guard ring structure. The use of an inhomogeneous resistive layer to control the potential between the guard ring and central metal overlay allows the production of high voltage semiconductor devices having breakdown voltages higher than can be achieved through the use of uniform resistivity films or other field shaping techniques.

Inventors

  • 👤 Lowell E Clark

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 20:24
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/111; H10D64/115; H10D8/00; H10D8/411; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49082; Y10T29/49099

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 237 words
A method for increasing the breakdown voltage of a semiconductor device having a first region of a first conductivity type having an upper surface, a second region of a second conductivity type located in said first region and in contact with said upper surface thereof, a third region of a higher doping concentration of said first conductivity type located in said first region in contact with said upper surface thereof and spaced from said second region, a first conductive terminal making an ohmic contact with said first region, a second conductive terminal having an outer boundary having a curved portion and making an ohmic contact with said second region, and a third conductive terminal located outside said second conductive terminal and making an ohmic contact with said third region, said third conductive terminal having an inner boundary having a curved portion and being spaced apart from said second conductive terminal forming a space between said respective curved portions thereof, said method comprising the steps of: applying a resistive material to said space between said respective curved portions thus making contact with said second and third terminals and forming a series of higher resistivity areas and lower resistivity areas in said resistive material with the higher resistivity areas being concentrated adjacent said third terminal to cause the electric field created through the application of a voltage to said terminals to be uniform between said second and third terminals.
Claim 2
Independent Claim 237 words
A method for increasing the breakdown voltage of a semiconductor device having a first region of a first conductivity type having an upper surface, a second region of a second conductivity type located in said first region and in contact with said upper surface thereof, a third region of a higher doping concentration of said first conductivity type located in said first region in contact with said upper surface thereof and spaced from said second region, a first conductive terminal making an ohmic contact with said first region, a second conductive terminal having an outer boundary having a curved portion and making an ohmic contact with said second region, and a third conductive terminal located outside said second conductive terminal and making an ohmic contact with said third region, said third conductive terminal having an inner boundary having a curved portion and being spaced apart from said second conductive terminal forming a space between said respective curved portions thereof, said method comprising the steps of: applying a resistive material to said space between said respective curved portions thus making contact with said second and third terminals and forming a series of higher resistivity areas and lower resistivity areas in said resistive material with the higher resistivity areas being concentrated adjacent said third terminal to cause the electric field created through the application of a voltage to said terminals to be uniform between said second and third terminals.
Claim 3
Dependent Claim 36 words
The method for increasing the breakdown voltage of a semiconductor device as recited in claim 1 wherein the forming step includes selectively depositing said resistive material to define voids therein for providing areas of higher resistance.
Claim 4
Dependent Claim 38 words
The method for increasing the breakdown voltage of a semiconductor device as recited in claim 1 wherein the forming step includes selectively removing portions of said resistive material to define voids therein for providing areas of higher resistance.
Claim 5
Dependent Claim 34 words
The method for increasing the breakdown voltage of a semiconductor device as recited in claim 1 wherein the forming step includes selectively adding impurities to said resistive material to define areas of lower resistance.

References Cited (Backward Citations)

US3562608A Cited
US3576478A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-06-23 1978-12-23 1979-06-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-06-23 1982-12-23 1983-06-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-06-23 1986-12-23 1987-06-24 $7700.00 Window Closed / Lapsed

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