Patent US3889236A successfully refreshed from Google Patents.
US3889236A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Interface system with two connecting lines
Assignee: US Philips Corp
•
Filing: 1973-10-09
•
Granted: 1975-06-10
•
Expires: 1993-10-09
Abstract
Abstract In various locations in computer systems or data transmission systems, the number of transmission or transport lines are reduced by the use of a serially operating interface adapter. The adapter which uses a special modulator and demodulator and associated coding technique, simplifies the information transferred over a transport line. The modulator includes means for generating bit pairs having an even and odd state and having the pairs of signal elements being of alternating parity. This arrangement enables a simplified approach for determining the start and the end of a message without the use of additional characters not present in the code set. The adapter also includes a demodulator which is adapted to recover and detect four-bitparity code signals for recovering start and stop signals of block information.
Inventors
- 👤 Horst Herger
- 👤 Helmut Hasso Schulz
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 18:09
CPC Classifications
H; H04; H04L; H04L7/00; H04L7/0008; H04J; H04J3/00; H04J3/02; H04J3/06; H04J3/0635; H04J3/0638
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
235 words
A serially-operating interface adapter for data input and output apparatus, comprising a modulator, a demodulator and a transport line via which blocks of information and clock signals can be transported, furthermore comprising a control unit which is connected to the transport conduit and which generates connect command signals and receives status signals, said transport conduit comprising a pair of lines consisting of a clock line and an information line, said modulator including means for generating bit pairs of signal elements having an even and an odd state, said pairs of signal elements being of alternating parity and being generated on a clock line and an information line respectively, said generating means being connected to clock inputs and information inputs activated under the control of a block start signal from said control unit, said generating means also being switchable between said states under the control of clock signals, said signal on the clock line corresponding to the inverted information signal in the case of odd parity and to the non-inverted information signal in the case of even parity means for halting, said switching under the control of a block stop signal, bits on different lines and occurring at the same time having the same parity being produced as frame signals, the demodulator which is connected to a clock line and an information line comprising a four-bit-parity detector for recovering block start signals and block stop signals.
Claim 2
Dependent Claim
235 words
A serially-operating interface adapter for data input and output apparatus, comprising a modulator, a demodulator and a transport line via which blocks of information and clock signals can be transported, furthermore comprising a control unit which is connected to the transport conduit and which generates connect command signals and receives status signals, said transport conduit comprising a pair of lines consisting of a clock line and an information line, said modulator including means for generating bit pairs of signal elements having an even and an odd state, said pairs of signal elements being of alternating parity and being generated on a clock line and an information line respectively, said generating means being connected to clock inputs and information inputs activated under the control of a block start signal from said control unit, said generating means also being switchable between said states under the control of clock signals, said signal on the clock line corresponding to the inverted information signal in the case of odd parity and to the non-inverted information signal in the case of even parity means for halting, said switching under the control of a block stop signal, bits on different lines and occurring at the same time having the same parity being produced as frame signals, the demodulator which is connected to a clock line and an information line comprising a four-bit-parity detector for recovering block start signals and block stop signals.
Claim 3
Dependent Claim
62 words
A serially-operating interface adapter as claimed in claim 1, wherein the modulator comprises a distributor having two outputs on which information clock pulse signals and frame clock pulse signals are alternately generated, and furthermore comprises a first logic circuit which is connected to an information input and which furthermore receives said information clock pulse signals and which forms the said bit pairs.
Claim 4
Dependent Claim
202 words
A serially-operating interface adapter as claimed in claim 1, wherein the modulator comprises a first logic circuit which receives information signals which are formed by a converter under the control of the control unit and also information clock pulses and includes first gate stages being connected in series to an output of said logic circuit, a first and second bistable element and a second logic circuit being included, said gate stages also being connected to an output of said first bistable element and an output of said second logic circuit, inputs of said first bistable element being connected to a clock input, inputs of the second logic circuit being connected to a clock input, to an output of the first bistable element, and to an output of a second bistable element, inputs of the second bistable element being connected to a clock input and to an information input, series connected second gate stages also being included which are connected parallel to said first gate stages, the first of said second gate stages being connected to an information input, the outputs of the second of each of said first and second gate stage circuits being connected to aclock line and an information line.
Claim 5
Dependent Claim
76 words
A serially-operating interface adapter as claimed in claim 3, wherein the demodulator comprises a third logic circuit, a third bistable element and a fifth logic circuit, inputs of the third logic circuit being connected to a clock line and an information line, an output thereof being connected to an input of said third bistable element, said fifth logic circuit having inputs thereof being connected to outputs of the third bistAble element and to an information line.
Claim 6
Dependent Claim
94 words
A serially-operating interface adapter as claimed in claim 4, wherein the modulator comprises a fourth logic circuit and fourth and fifth bistable elements, inputs thereof being connected to a clock line and an information line, to an output of said third bistable element and to an output of said fifth bistable element, said fourth bistable element having inputs thereof being connected to outputs of said third bistable element and of said fourth logic circuit, inputs of said fifth bistable element being connected to outputs of the fourth logic circuit and the fourth bistable element.
Claim 7
Dependent Claim
41 words
A serially-operating interface adapter as claimed in claim 1, wherein the clock input comprises a blocking element capable of being unblocked for a given period of time under the control of a signal edge received by the demodulator and a clock.
Claim 8
Dependent Claim
59 words
The interface adapter of claim 1 wherein said demodulator including a clock signal recovery unit which adds a signal transition, to a clock signal element under control of a block start signal, and also including a suppressor and wherein signal transitions received on an information line are suppressed by said suppressor under the control of a block stop signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-06-09 | 1978-12-09 | 1979-06-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-06-09 | 1982-12-09 | 1983-06-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-06-09 | 1986-12-09 | 1987-06-10 | $7700.00 | Window Closed / Lapsed |