Muting circuit

Claim 2

A muting circuit comprising: a. first and second voltage sources; b. a pre-amplifier connected across the first voltage source; c. voltage detecting means for the first voltage source; d. a power amplifier having an input terminal and first and second output transistors whose collector and emitter are connected in series to each other across the second voltage source, the connection point between said first and second transistors being connected to an output terminal; e. first switching means connected to the bases of the first and second transistors, the output terminal and a reference point, and operative to clamp the base of the first and second transistors into a predetermined DC voltage in response to an output signal of the voltage detecting means; and f. second switching means connected between the input terminal and the reference point, and operative to attenuate a drive signal of the power amplifier in response to the output signal of the voltage detecting means.

Claim 3

A muting circuit according to claim 1, wherein said voltage detecting means includes a time constant circuit having a resistor and a capacitor connected across said voltage source and a switching transistor which produces a control signal controlling by the time constant circuit.

Claim 4

A muting circuit comprising: a. a voltage source; b. first and second transistors whose collector-emitter are substantially connected in series to each other with complemeNtary polarities across said voltage source; c. an output terminal connected to the connection point between said first and second transistors to which a load is connected directly; d. first means for detecting a DC voltage at said output terminal; e. a reference point; f. second means for detecting the voltage of said voltage source, said means including a time constant circuit connected between said voltage source and said reference point and a switching transistor controlled by the output of said time constant circuit to produce a control signal; g. switching means including first and second muting transistors whose emitters are connected to each other and to said reference point, and whose collectors are connected to the bases of said first and second transistors respectively, and said switching means controlled by the output of said first means and the control signal from said second means and operative to clamp the base electrodes of said first and second transistors at a predetermined DC voltage.

Claim 5

A muting circuit comprising: a. a voltage source; b. first and second transistors whose collector-emitter are substantially connected in series to each other with complemeNtary polarities across said voltage source; c. an output terminal connected to the connection point between said first and second transistors to which a load is connected directly; d. first means for detecting a DC voltage at said output terminal; e. a reference point; f. second means for detecting the voltage of said voltage source, said means including a time constant circuit connected between said voltage source and said reference point and a switching transistor controlled by the output of said time constant circuit to produce a control signal; g. switching means including first and second muting transistors whose emitters are connected to each other and to said reference point, and whose collectors are connected to the bases of said first and second transistors respectively, and said switching means controlled by the output of said first means and the control signal from said second means and operative to clamp the base electrodes of said first and second transistors at a predetermined DC voltage.

Claim 6

A muting circuit according to claim 3, wherein said time constant circuit includes first and second resistors connected in series across the voltage source, a third resistor and a capacitor connected in series across said second resistor, a diode connected in parallel with said third resistor, an output terminal connected to a connection point between said diode and said capacitor and the base of the switching transistor.

Claim 7

A muting circuit according to claim 3, wherein said switching means further includes a pair of diodes connected between the collectors of said first and second muting transistors and the bases of said first and second transistors respectively with the same polarity as said first and second muting transistors.

Claim 8

A muting circuit according to claim 3, further including: a. first and second resistors which are connected in series between the base of one of said first and second muting transistors and the output terminal, the connection point between said resistors being supplied with said control signal from said second means; b. a low pass filter connected between the base of the other of said first and second muting transistors and the output terminal; and c. means for coupling the bases of said first and second muting transistors to each other.

Claim 9

A muting circuit comprising: a. a voltage source; b. first and second transistors whose collector-emitters are connected in series to each other with complementary polarities across said voltage source; c. an output terminal connected to the connection point between said first and second transistors to which a load is connected directly; d. first means for detecting a DC voltage at said output terminal; e. second means for detecting a voltage of said voltage source, which produce a control signal in response to the voltage value of said voltage source, said second means including first and second time constant circuits connected in series to each other across said voltage source, and first and second switching transistors whose bases are connected to the output terminals of said first and second time constant circuits respectively, and controlled by the output of at least one of said first and second time constant circuits; and f. switching means connected between the base electrodes of said first and second transistors, controlled by the output of said first means and the control signal from said second means and operative to clamp both base electrodes of said first and second transistors at a predetermined DC voltage, said switching means including first and second muting transistors, whose emitters are connected to each other and to ground, and whose collectors are connected to the bases of said first and second transistors, respectively.

Claim 10

A muting circuit comprising: a. a voltage source; b. first and second transistors whose collector-emitters are connected in series to each other with complementary polarities across said voltage source; c. an output terminal connected to the connection point between said first and second transistors to which a load is connected directly; d. first means for detecting a DC voltage at said output terminal; e. second means for detecting a voltage of said voltage source, which produce a control signal in response to the voltage value of said voltage source, said second means including first and second time constant circuits connected in series to each other across said voltage source, and first and second switching transistors whose bases are connected to the output terminals of said first and second time constant circuits respectively, and controlled by the output of at least one of said first and second time constant circuits; and f. switching means connected between the base electrodes of said first and second transistors, controlled by the output of said first means and the control signal from said second means and operative to clamp both base electrodes of said first and second transistors at a predetermined DC voltage, said switching means including first and second muting transistors, whose emitters are connected to each other and to ground, and whose collectors are connected to the bases of said first and second transistors, respectively.

Claim 11

A muting circuit comprising: a. a voltage source; b. a first SEPP amplifier having a first pair of input terminals and a first output terminal, and cOnnected across said voltage source, said first output terminal being connected to a first load directly; c. a second SEPP amplifier having a second pair of input terminals and a second output terminal, and connected across said voltage source, said second output terminal being connected to a second load directly; d. a reference point; e. a first time constant circuit having a first resistor and a first capacitor, said first resistor and first capacitor being connected in series to each other between one terminal of the voltage source and said reference point; f. a first switching transistor whose base-emitter is connected across said first capacitor and whose emitter is connected to the reference point; g. a first muting transistor whose collector is connected to one of said first pair of input terminals of the first SEPP amplifier and to one of said second pair of input terminals of the second SEPP amplifier and whose emitter is connected to said reference point, and whose base is connected to the collector of said first switching transistor and the first output terminal; h. a second time constant circuit having a second resistor and a second capacitor, said second resistor and second capacitor being connected in series to each other between the other terminal of the voltage source and said reference point; i. a second switching transistor whose base-emitter is connected across said second capacitor and whose emitter is connected to said reference point; and j. a second muting transistor whose collector is connected to the other of said first pair of input terminals of said first SEPP amplifier and to the other of said second pair of input terminals of said second SEPP amplifier, and whose emitter is grounded, and whose base is connected to the first and second output terminals.

Claim 12

A muting circuit comprising: a. a voltage source; b. a first SEPP amplifier having a first pair of input terminals and a first output terminal, and cOnnected across said voltage source, said first output terminal being connected to a first load directly; c. a second SEPP amplifier having a second pair of input terminals and a second output terminal, and connected across said voltage source, said second output terminal being connected to a second load directly; d. a reference point; e. a first time constant circuit having a first resistor and a first capacitor, said first resistor and first capacitor being connected in series to each other between one terminal of the voltage source and said reference point; f. a first switching transistor whose base-emitter is connected across said first capacitor and whose emitter is connected to the reference point; g. a first muting transistor whose collector is connected to one of said first pair of input terminals of the first SEPP amplifier and to one of said second pair of input terminals of the second SEPP amplifier and whose emitter is connected to said reference point, and whose base is connected to the collector of said first switching transistor and the first output terminal; h. a second time constant circuit having a second resistor and a second capacitor, said second resistor and second capacitor being connected in series to each other between the other terminal of the voltage source and said reference point; i. a second switching transistor whose base-emitter is connected across said second capacitor and whose emitter is connected to said reference point; and j. a second muting transistor whose collector is connected to the other of said first pair of input terminals of said first SEPP amplifier and to the other of said second pair of input terminals of said second SEPP amplifier, and whose emitter is grounded, and whose base is connected to the first and second output terminals.