Patent US3889162A successfully refreshed from Google Patents.
← Back to Patent Explorer
US3889162A Expired / Lapsed US ⏱️ 0.0 years remaining

Solenoid driving means

Assignee: LUCAS LEDEX Inc
•
Filing: 1974-02-04
•
Granted: 1975-06-10
•
Expires: 1994-02-04
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract Apparatus for sequentially energizing and maintaining a pulrality of solenoids in operated condition for a predetermined period of time includes electro-optical distributive means for sequentially applying triggering pulses circuits, a plurality of solenoid operating amplifiers, each of said circuits including two operational amplifiers, one of which is included in a circuit for providing a solenoid energizing pulse, and the other of which is included in a circuit for providing a solenoid holding pulse.

Inventors

  • 👤 John L Myers

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 22:01
CPC Classifications
H; H01; H01F; H01F7/00; H01F7/06; H01F7/08; H01F7/18; H01F7/1805; F; F02; F02D; F02D41/00; F02D41/20; F02D41/30; F02D41/32; F02D41/36; F02D41/365; F02P; F02P7/00; F02P7/06; F02P7/073; F02D2041/2003; F02D2041/2017; F02D2041/202; F02D2041/2031

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 207 words
A solenoid driving circuit comprising, in combination, first operational amplifier means having an inverting input, a non-inverting input, an output, and feedback means connecting the output and the non-inverting input; input signal means connected to the non-inverting input of said first operational amplifier means and capable of applying an input signal thereto; means for connecting a source of threshold potential to the inverting input of said first operational amplifier means; second operational amplifier means having an inverting input, a non-inverting input, an output, and feedback means connecting the output and the non-inverting input; means for connecting a source of threshold potential to the noninverting input of said second operational amplifier means; signal transmitting means for applying a signal from the output of said first operational amplifier means to the inverting input of said second operational amplifier means, and including signal duration limiting means; high-voltage driver means connected to the output of said second operational amplifier means and responsive to a signal on said output to produce a high-voltage solenoid-energizing pulse; and low-voltage driver means connected to the output of said first operational amplifier means and responsive to a signal on said output to produce a low-voltage solenoid holding pulse following termination of the high voltage solenoid-energizing pulse.
Claim 2
Dependent Claim 207 words
A solenoid driving circuit comprising, in combination, first operational amplifier means having an inverting input, a non-inverting input, an output, and feedback means connecting the output and the non-inverting input; input signal means connected to the non-inverting input of said first operational amplifier means and capable of applying an input signal thereto; means for connecting a source of threshold potential to the inverting input of said first operational amplifier means; second operational amplifier means having an inverting input, a non-inverting input, an output, and feedback means connecting the output and the non-inverting input; means for connecting a source of threshold potential to the noninverting input of said second operational amplifier means; signal transmitting means for applying a signal from the output of said first operational amplifier means to the inverting input of said second operational amplifier means, and including signal duration limiting means; high-voltage driver means connected to the output of said second operational amplifier means and responsive to a signal on said output to produce a high-voltage solenoid-energizing pulse; and low-voltage driver means connected to the output of said first operational amplifier means and responsive to a signal on said output to produce a low-voltage solenoid holding pulse following termination of the high voltage solenoid-energizing pulse.
Claim 3
Dependent Claim 19 words
The solenoid driving circuit of claim 1 in which the signal duration limiting means includes capacitive and resistive elements.
Claim 4
Dependent Claim 34 words
The solenoid driving circuit of claim 1, also including fast reset means connected to the inverting input of said second operational amplifier means for enabling the rapid resetting of the signal duration limiting means.
Claim 5
Dependent Claim 18 words
The solenoid driving circuit of claim 3 in which the fast reset means includes unidirectional signal translating means.
Claim 6
Dependent Claim 24 words
The solenoid driving circuit of claim 1 in which the high-voltage solenoid energizing pulse is of shorter duration than the low-voltage solenoid holding pulse.
Claim 7
Dependent Claim 171 words
A solenoid driving circuit comprising, in combination, first operational amplifier means having an inverting input, a non-inverting input, an output, and feedback means connecting the output and the non-inverting input; input signal means connected to the non-inverting input of said first operational amplifier means and capable of applying an input signal thereto; means for connecting a source of threshold potential to the inverting input of said first operational amplifier means; second operational amplifier means having an inverting input, a non-inverting input, an output, and feedback means connecting the output and the non-inverting input; means for connecting a source of threshold potential to the non-inverting input of said second operational amplifier means; signal transmitting means for applying a signal from the output of said first operational amplifier means to the inverting input of said second operational amplifier means, and including signal duration limiting means; and high-voltage driver means connected to the output of said second operational amplifier means and responsive to a signal on said output to produce a high-voltage solenoid-energizing pulse.
Claim 8
Dependent Claim 171 words
A solenoid driving circuit comprising, in combination, first operational amplifier means having an inverting input, a non-inverting input, an output, and feedback means connecting the output and the non-inverting input; input signal means connected to the non-inverting input of said first operational amplifier means and capable of applying an input signal thereto; means for connecting a source of threshold potential to the inverting input of said first operational amplifier means; second operational amplifier means having an inverting input, a non-inverting input, an output, and feedback means connecting the output and the non-inverting input; means for connecting a source of threshold potential to the non-inverting input of said second operational amplifier means; signal transmitting means for applying a signal from the output of said first operational amplifier means to the inverting input of said second operational amplifier means, and including signal duration limiting means; and high-voltage driver means connected to the output of said second operational amplifier means and responsive to a signal on said output to produce a high-voltage solenoid-energizing pulse.
Claim 9
Dependent Claim 19 words
The solenoid driving circuit of claim 6 in which the signal duration limiting means includes capacitive and resistive elements.
Claim 10
Dependent Claim 34 words
The solenoid driving circuit of claim 6, also including fast reset means connected to the inverting input of said second operational amplifier means for enabling the rapid resetting of the signal duration limiting means.
Claim 11
Dependent Claim 18 words
The solenoid driving circuit of claim 8 in which the fast reset means includes unidirectional signal translating means.

References Cited (Backward Citations)

US3386000A Cited
US3340407A Cited
US3530341A Cited
US3678298A Cited
US3792261A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-06-09 1978-12-09 1979-06-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-06-09 1982-12-09 1983-06-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-06-09 1986-12-09 1987-06-10 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag