Digital signal leveling device

Claim 2

Automatic gain control apparatus for leveling the amplitude of pulses received at a predetermined repetition rate, said automatic gain control apparatus having an input terminal and an output terminal, said automatic gain control apparatus comprising: A. an analog-to-digital converter coupled to said input terminal for converting the amplitude of pulses appearing thereat into a plural bit digital representation, each of said bits issuing from separate outputs from said analog-to-digital converter: B. a plurality of pulse delay means corresponding in number to the number of bits in said plural bit representation; C. means coupling each output from said analog-to-digital converter to the input of a separate one of said plurality of pulse delay means; D. scaler means connected between the input and output terminals of said automatic gain control apparatus for selectively attenuating a pulse passing therethrough in accordance with level control signals applied to said scaler; and E. means for receiving the digital representation from said delay means and developing level control signals in accordance with the bit configuration of the plurality of pulse delay means for application to said scaler.

Claim 3

Automatic gain control apparatus for leveling the amplitude of pulses received at a predetermined repetition rate, said automatic gain control apparatus having an input terminal and an output terminal, said automatic gain control apparatus comprising: A. an analog-to-digital converter coupled to said input terminal for converting the amplitude of pulses appearing thereat into a plural bit digital representation, each of said bits issuing from separate outputs from said analog-to-digital converter: B. a plurality of pulse delay means corresponding in number to the number of bits in said plural bit representation; C. means coupling each output from said analog-to-digital converter to the input of a separate one of said plurality of pulse delay means; D. scaler means connected between the input and output terminals of said automatic gain control apparatus for selectively attenuating a pulse passing therethrough in accordance with level control signals applied to said scaler; and E. means for receiving the digital representation from said delay means and developing level control signals in accordance with the bit configuration of the plurality of pulse delay means for application to said scaler.

Claim 4

Automatic gain control apparatus for leveling the amplitude of pulses received at a predetermined repetition rate, said automatic gain control apparatus having an input terminal and an output terminal, said automatic gain control apparatus comprising: A. an analog-to-digital converter coupled to said input terminal for converting the amplitude of pulses appearing thereat into a plural bit digital representation, each of said bits issuing from separate outputs from said analog-to-digital converter: B. a plurality of pulse delay means corresponding in number to the number of bits in said plural bit representation; C. means coupling each output from said analog-to-digital converter to the input of a separate one of said plurality of pulse delay means; D. scaler means connected between the input and output terminals of said automatic gain control apparatus for selectively attenuating a pulse passing therethrough in accordance with level control signals applied to said scaler; and E. means for receiving the digital representation from said delay means and developing level control signals in accordance with the bit configuration of the plurality of pulse delay means for application to said scaler.

Claim 5

Automatic gain control apparatus for leveling the amplitude of pulses received at a predetermined repetition rate, said automatic gain control apparatus having an input terminal and an output terminal, said automatic gain control apparatus comprising: A. an analog-to-digital converter coupled to said input terminal for converting the amplitude of pulses appearing thereat into a plural bit digital representation, each of said bits issuing from separate outputs from said analog-to-digital converter; B. a plurality of pulse delay means corresponding in number to the number of bits in said plural bit representation; C. means coupling each output from said analog-to-digital converter to the input of a separate one of said plurality of pulse delay means; D. a decoder responsive to a plurality of digital inputs for issuing an output signal on a selected one of a plurality of output lines therefrom, said selected output line being determined in accordance with the bit configuration of said plurality of digiTal inputs, said plurality of digital inputs corresponding in number to the number of bits in said plural bit representation, each of said plurality of said output lines corresponding to a unique combination of said plural bit representation; E. means coupling separate outputs from each of said pulse delay means to corresponding separate inputs to said decoder; F. a scaler connected between the input and output terminals of said automatic gain control apparatus for selectively attenuating a pulse passing therethrough in accordance with level control signals applied to said scaler; and G. scaler set up logic coupled to said plurality of outputs from said decoder and responsive to the presence of a signal on a single one thereof to develop level control signals for application to said scaler.

Claim 6

Automatic gain control apparatus for leveling the amplitude of pulses received at a predetermined repetition rate, said automatic gain control apparatus having an input terminal and an output terminal, said automatic gain control apparatus comprising: A. an analog-to-digital converter coupled to said input terminal for converting the amplitude of pulses appearing thereat into a plural bit digital representation, each of said bits issuing from separate outputs from said analog-to-digital converter; B. a plurality of pulse delay means corresponding in number to the number of bits in said plural bit representation; C. means coupling each output from said analog-to-digital converter to the input of a separate one of said plurality of pulse delay means; D. a decoder responsive to a plurality of digital inputs for issuing an output signal on a selected one of a plurality of output lines therefrom, said selected output line being determined in accordance with the bit configuration of said plurality of digiTal inputs, said plurality of digital inputs corresponding in number to the number of bits in said plural bit representation, each of said plurality of said output lines corresponding to a unique combination of said plural bit representation; E. means coupling separate outputs from each of said pulse delay means to corresponding separate inputs to said decoder; F. a scaler connected between the input and output terminals of said automatic gain control apparatus for selectively attenuating a pulse passing therethrough in accordance with level control signals applied to said scaler; and G. scaler set up logic coupled to said plurality of outputs from said decoder and responsive to the presence of a signal on a single one thereof to develop level control signals for application to said scaler.

Claim 7

The automatic gain control apparatus of claim 2 in which each of said pulse delay means comprises a shift register.

Claim 8

The automatic gain control apparatus of claim 3 which further includes a clock for shifting said shift registers at a predetermined rate in accordance with the time span between the reception of succeeding pulses from a common source.

Claim 9

The automatic gain control of claim 4 in which said scaler comprises a plurality of serially disposed attenuators, each providing a different attenuation ratio.

Claim 10

The automatic gain control apparatus of claim 5 in which the attenuation ratios of said attenuators are related to one another in powers of 2.