Patent US3883869A successfully refreshed from Google Patents.
← Back to Patent Explorer
US3883869A Expired / Lapsed US ⏱️ 0.0 years remaining

Acquisition logic circuitry

Assignee: United States Department of the Navy
•
Filing: 1970-12-02
•
Granted: 1975-05-13
•
Expires: 1990-12-02
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A logic circuit for generating an acquiring and locking signal for locking the missile antenna to the main beam of an airborne missile control system antenna. The logic circuit detects and measures the peak automatic gain control voltage of the missile receiver as the missile antenna scans in one direction. After the target illuminating signal from the launching aircraft has been detected, the missile antenna scans in the other direction until the automatic gain control voltage of the missile receiver equals the previously measured voltage.

Inventors

  • 👤 Peter M Buccieri

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 14:23
CPC Classifications
F; F41; F41G; F41G7/00; F41G7/20; F41G7/24

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 182 words
In an acquisition logic circuit for acquiring a radiating source with a tracking antenna the combination comprising: a. a first comparator circuit having a first input coupled to a signal source and having a second input and an output; b. a first counting circuit having an input and an output; c. a second counting circuit having an input and an output; d. switch circuit means coupled to said first comparator circuit and to said first and second counting circuits for successively comparing the outputs of said first and second counting circuits with the input of said first comparator circuit; e. second comparator circuit means having a first input coupled to the output of said first counter and a second input connected to the output of said second counter and generating an output signal when said two inputs are equal; f. an AND circuit having a first input coupled to the output of said second comparator circuit and having a second input coupled to a valid signal indicator for producing an output signal representing alignment of the missile antenna with the radiating source.
Claim 2
Dependent Claim 182 words
In an acquisition logic circuit for acquiring a radiating source with a tracking antenna the combination comprising: a. a first comparator circuit having a first input coupled to a signal source and having a second input and an output; b. a first counting circuit having an input and an output; c. a second counting circuit having an input and an output; d. switch circuit means coupled to said first comparator circuit and to said first and second counting circuits for successively comparing the outputs of said first and second counting circuits with the input of said first comparator circuit; e. second comparator circuit means having a first input coupled to the output of said first counter and a second input connected to the output of said second counter and generating an output signal when said two inputs are equal; f. an AND circuit having a first input coupled to the output of said second comparator circuit and having a second input coupled to a valid signal indicator for producing an output signal representing alignment of the missile antenna with the radiating source.
Claim 3
Dependent Claim 44 words
The logic circuit of claim 1 wherein said switch circuit means is connected in circuit with an AND gate to an energizing means, an enabling signal source coupled to said ANd gate for enabling said ANd gate after said first counting circuit stops counting.
Claim 4
Dependent Claim 82 words
The logic circuit of claim 1 wherein said switch circuit means has a first position connecting the output of said first comparator to the input of said first counter circuit and connecting the output of said first counter circuit to the second input of said first comparator and has a second position connecting the output of said first comparator to the input of said second counter and connecting the output of said second counter to said second input of said first comparator.

References Cited (Backward Citations)

US3343160A Cited
US3803603A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-05-12 1978-11-11 1979-05-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-05-12 1982-11-11 1983-05-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-05-12 1986-11-11 1987-05-13 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag