Electronic phase-sensitive detector circuit with D.C. drift neutralization

Claim 1

An electronic phase-sensitive detector circuit comprising two sections each of which sections comprises a signal translation device and two alternative paths for current therethrough with a switching device in each path, the switching devices of one section being complementary to the switching devices of the other section, connection means for enabling reference signals to be applied so as to cause one or other of the switching devices of each section to conduct depending on the polarities of the reference signals, junctions between respective paths of the two sections through which current conduction is simultaneous, connection means for enabling an input signal to be applied to at least one of the signal translation devices, output means connected to each of the said junctions to provide respective output signals representative of the difference in current flows between the two paths connected to a junction, means for obtaining a signal representative of the mean value of the output signals, integrating means for the aforesaid signal, and means for applying the output of the integrating means to at least one of the signal translation devices in a manner to tend to neutralise dc drift.