Patent US3883697A successfully refreshed from Google Patents.
US3883697A
Expired / Lapsed
US
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Digital conference circuit
Assignee: TDK Micronas GmbH
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Filing: 1973-10-18
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Granted: 1975-05-13
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Expires: 1993-10-18
Abstract
Abstract The conference circuit disclosed employs a time sharing technique and is all digital in nature providing for 30 conferees to be engaged in up to 10 different conferences and places no restrictions on which conference channel may be associated with any particular channel. The circuit includes a main memory in which is stored conference identity words defining the channels on which a particular conference may take place and in which is stored the speech of a conferee associated with the appropriate conference identity word. A 30 state counter controls the addressing of the main memory and a secondary memory into which the conferee''s speech is transferred from the main memory under control of a speech detector connected to the TDM input highway. The output of the secondary memory is transmitted on the appropriate channel of the output TDM highway to the other conferees associated with the conference in process. An idle code signal is provided for transmission to the conferee just detected as doing the talking.
Inventors
- 👤 Colin R Brown
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 19:45
CPC Classifications
H; H04; H04Q; H04Q11/00; H04Q11/04; H04Q11/0407; H04M; H04M3/00; H04M3/42; H04M3/56; H04M3/568; H04M3/569
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
284 words
A digital conference circuit for an automatic telephone exchange comprising: a first TDM (time division multiplex) signal input highway from said exchange to said circuit; a second TDM signal output highway from said circuit to said exchange; a main memory having M storage sections each associated with a different one of M channels of said TDM signal, where M is an integer greater than one; addressing means coupled to said main memory to select in sequence each of said storage sections; inputs from said exchange coupled to said main memory to set up a conference for N subscribers, said conference being identified by a given digital number which is stored in each of N of said storage sections, each of said N subscribers being connected to said circuit by a different one of N of said channels of said TDM signal, each of said N channels corresponding to a different one of said N of said storage sections, where N is an integer greater than one but less than M; and detection and storage means coupled to said addressing means, said first and second highways and said main memory, said detection and storage means being responsive to speech from one of said N subscribers in said conference to cause code representations of each speech sample from said one of said N subscribers to be transmitted to the others of said N subscribers in said conference over said second highway in the appropriate ones of said N of said channels of said TDM signal and to transmit a no-signal code to said one of said N subscribers over said second highway in the appropriate one of said N of said channels of said TDM signal.
Claim 2
Dependent Claim
284 words
A digital conference circuit for an automatic telephone exchange comprising: a first TDM (time division multiplex) signal input highway from said exchange to said circuit; a second TDM signal output highway from said circuit to said exchange; a main memory having M storage sections each associated with a different one of M channels of said TDM signal, where M is an integer greater than one; addressing means coupled to said main memory to select in sequence each of said storage sections; inputs from said exchange coupled to said main memory to set up a conference for N subscribers, said conference being identified by a given digital number which is stored in each of N of said storage sections, each of said N subscribers being connected to said circuit by a different one of N of said channels of said TDM signal, each of said N channels corresponding to a different one of said N of said storage sections, where N is an integer greater than one but less than M; and detection and storage means coupled to said addressing means, said first and second highways and said main memory, said detection and storage means being responsive to speech from one of said N subscribers in said conference to cause code representations of each speech sample from said one of said N subscribers to be transmitted to the others of said N subscribers in said conference over said second highway in the appropriate ones of said N of said channels of said TDM signal and to transmit a no-signal code to said one of said N subscribers over said second highway in the appropriate one of said N of said channels of said TDM signal.
Claim 3
Dependent Claim
34 words
A circuit according to claim 1, wherein said main memory, said addressing means and said detection and storage means are capable of establishing a plurality of simultaneous conferences which can be of different sizes.
Claim 4
Dependent Claim
90 words
A circuit according to claim 2, wherein said main memory includes a conference identity memory section having a first group of M storage sections in which said given digital number identifying said conference is stored in the appropriate N of said first group of M storage sections, and a speech detection memory section having a second group of M storage sections associated with said first group of M storage sections to store speech codes of said N subscribers in the appropriate N of said second group of M storage sections.
Claim 5
Dependent Claim
16 words
A circuit according to claim 3, wherein said addressing means includes an M state binary counter.
Claim 6
Dependent Claim
164 words
A circuit according to claim 4, wherein said detection and storage means includes a speech detection circuit coupled to said first highway and said main memory to detect coded speech samples from said one of said N subscribers and to couple said detected coded speech samples to the appropriate one of said second group of M storage sections, a secondary memory coupled to said main memory, said speech detection circuit and said addressing means, said secondary memory storing said given digital number received from said main memory, the identity of said one of said N subscribers received from said addressing means and said detected coded speech samples from said speech detection circuitry, and output means coupled to said secondary memory to transmit said detected coded speech samples stored in said secondary memory to said second highway for distribution to said others of said N subscribers and to transmit said no-signal code to said second highway for coupling to said one of said N subscribers.
Claim 7
Dependent Claim
103 words
A circuit according to claim 5, wherein said output means includes a comparator coupled to said secondary memory and said addressing means to produce a control signal when the address of said one of said N subscribers is present at the output of said secondary memory and said addressing means simultaneously, and a multiplexer coupled to said second highway, said comparator and a source of said no-signal code, said multiplexer transmitting said detected coded speech samples to said second highway during the absence of said control signal and transmitting said no-signal code to said second highway during the presence of said control signal.
Claim 8
Dependent Claim
22 words
A circuit according to claim 5, wherein information stored in said secondary memory is updated under control of said speech detection circuit.
Claim 9
Dependent Claim
90 words
A circuit according to claim 1, wherein said main memory includes a conference identify memory section having a first group of M storage sections in which said given digital number identifying said conference is stored in the appropriate N of said first group of M storage sections, and a speech detection memory section having a second group of M storage sections associated with said first group of M storage sections to store speech codes of said N subscribers in the appropriate N of said second group of M storage sections.
Claim 10
Dependent Claim
16 words
A circuit according to claim 1, wherein said addressing means includes an M state binary counter.
Claim 11
Dependent Claim
161 words
A circuit according to claim 1, wherein said detection and storage means includes a speech detection circuit coupled to said first highway and said main memory to detect coded speech samples from said one of said N subscribers and to couple said detected coded speech samples to the appropriate one Of said M storage sections, a secondary memory coupled to said main memory, said speech detection circuit and said addressing means, said secondary memory storing said given digital number received from said main memory, the identity of said one of said N subscribers received from said addressing means and said detected coded speech samples from said speech detection circuitry, and output means coupled to said secondary memory to transmit said detected coded speech samples stored in said secondary memory to said second highway for distribution to said others of said N subscribers and to transmit said no-signal code to said second highway for coupling to said one of said N subscribers.
Claim 12
Dependent Claim
103 words
A circuit according to claim 10, wherein said output means includes a comparator coupled to said secondary memory and said addressing means to produce a control signal when the address of said one of said N subscribers is present at the output of said secondary memory and said addressing means simultaneously, and a multiplexer coupled to said second highway, said comparator and a source of said no-signal code, said multiplexer transmitting said detected coded speech samples to said second highway during the absence of said control signal and transmitting said no-signal code to said second highway during the presence of said control signal.
Claim 13
Dependent Claim
22 words
A circuit according to claim 10, wherein information stored in said secondary memory is updated under control of said speech detection circuit.
Claim 14
Dependent Claim
136 words
A circuit according to claim 1, further including a first additional storage means for each of said M storage sections of said main memory coupled to said detection and storage means a multiplexer having its output coupled to said second highway; a second additional storage means for each of said M storage sections of said main memory coupled to said multiplexer, said second additional storage means storing predetermined digitized tones for each of said M storage sections; and additional inputs from said exchange connected to said first and second storage means, said additional inputs activating said first storage means to produce an output signal to inhibit said detection and storage means and to substitute the appropriate one of said digitized tones for said code representations of each speech sample from said one of said N subscribers.
Claim 15
Dependent Claim
59 words
A circuit according to claim 1, further including additional means associated with said detection and storage means to delay said code representation of each speech sample from said one of said N subscribers prior to transmission to said second highway to prevent loss of speech at the time of responding to speech from said one of said N subscribers.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-05-12 | 1978-11-11 | 1979-05-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-05-12 | 1982-11-11 | 1983-05-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-05-12 | 1986-11-11 | 1987-05-13 | $7700.00 | Window Closed / Lapsed |