US3883687A
Expired / Lapsed
US
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Coded signal synchronizing device
Assignee: Alcatel CIT SA
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Filing: 1973-09-26
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Granted: 1975-05-13
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Expires: 1993-09-26
Abstract
Abstract The invention concerns a device for the synchronizing, at the receiving end, of a sequence of bits used for identifying the instant at which a telegraphic transition appears in intervals of time having a uniform length, that synchronizing being based on a counting of intervals not comprising a transition.
Inventors
- 👤 Claude Stenstrom
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 09:02
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/38; H04L25/40; H04L25/49; H04L25/493; H04L7/00; H04L7/02; H04L7/033
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
262 words
A synchronization device for use in the receiving unit of a data transmission system providing signals of first and second levels and operating by division of time into intervals having a fixed duration subdivided into subintervals during which a signal transition between said first and second levels may occur, with coding of the interval in which a transition appears being represented by a word of p bits identifying the order of the subinterval thereof in which the transition occurs and the coding of the interval in which no transition occurs being represented by a first permanent word of p bits for one level and a second permanent word of p bits for a second level, comprising detector means receiving an uninterrupted sequence of bits for detecting each occurrence of one of said first and second permanent words and providing an output in response thereto, means providing clock signals synchronized to said sequence of bits, first counter means responsive to said clock signals for providing a synchronizing output for each count of p clock signals, second counter means responsive to the outputs of said detector means and said first counter means for counting the number of occurrences of said one of said first and second permanent words in synchronism with said synchronizing output, and control means responsive to said first and second counter means for advancing the count of said first counter means independently of said clock signals each time the count of said second counter means is less than a prescribed amount within an interval of a given number of synchronizing outputs.
Claim 2
Dependent Claim
262 words
A synchronization device for use in the receiving unit of a data transmission system providing signals of first and second levels and operating by division of time into intervals having a fixed duration subdivided into subintervals during which a signal transition between said first and second levels may occur, with coding of the interval in which a transition appears being represented by a word of p bits identifying the order of the subinterval thereof in which the transition occurs and the coding of the interval in which no transition occurs being represented by a first permanent word of p bits for one level and a second permanent word of p bits for a second level, comprising detector means receiving an uninterrupted sequence of bits for detecting each occurrence of one of said first and second permanent words and providing an output in response thereto, means providing clock signals synchronized to said sequence of bits, first counter means responsive to said clock signals for providing a synchronizing output for each count of p clock signals, second counter means responsive to the outputs of said detector means and said first counter means for counting the number of occurrences of said one of said first and second permanent words in synchronism with said synchronizing output, and control means responsive to said first and second counter means for advancing the count of said first counter means independently of said clock signals each time the count of said second counter means is less than a prescribed amount within an interval of a given number of synchronizing outputs.
Claim 3
Dependent Claim
59 words
A synchronization device as defined in claim 1 wherein said detector means includes a shift register means receiving said uninterrupted sequence of bits and said clock signals and first gate means connected to said shift register means for providing said output when the state of said shift register means represents said one of said first and second permanent words.
Claim 4
Dependent Claim
46 words
A synchronization device as defined in claim 2 wherein said detector means further includes second gate means connected to said shift register means for providing a reference output when the state of said shift register means represents the other of said first and second permanent words.
Claim 5
Dependent Claim
63 words
A synchronization device as defined in claim 3 wherein said control means includes third counter means for providing an advance signal at the end of the counting of each given number of synchronizing outputs and third gate means for applying said advance signal to said first counter means only when the count of said second counter means is less than said prescribed amount.
Claim 6
Dependent Claim
98 words
A synchronization device as defined in claim 4 wherein said second counter means includes a counter having a capacity equal to said prescribed amount, a first logic gate connected to the output of said counter providing a first output when the state of said counter is less than said prescribed amount and a second output when the state of said counter is equal to said prescribed amount and a second logic gate having its output connected to said counter and inputs connected to the outputs of said first logic gate, said detector means and said first counter means.
Claim 7
Dependent Claim
47 words
A synchronization device as defined in claim 5 wherein said third gate means comprises an AND gate having inputs connected to the outputs of said first logic gate of said second counter means and said third counter means and an output connected to said first counter means.
Claim 8
Dependent Claim
30 words
A synchronization device as defined in claim 6 wherein the output of said third counter means is connected to a reset input of The counter of said second counter means.
Claim 9
Dependent Claim
62 words
A synchronization device as defined in claim 1 wherein said control means includes third counter means for providing an advance signal at the end of the counting of each given number of synchronizing outputs and gate means for applying said advance signal to said first counter means only when the count of said second counter means is less than said prescribed amount.
Claim 10
Dependent Claim
98 words
A synchronization device as defined in claim 1 wherein said second counter means includes a counter having a capacity equal to said prescribed amount, a first logic gate connected to the output of said counter providing a first output when the state of said counter is less than said prescribed amount and a second output when the state of said counter is equal to said prescribed amount and a second logic gate having its output connected to said counter and inputs connected to the outputs of said first logic gate, said detector means and said first counter means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-05-12 | 1978-11-11 | 1979-05-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-05-12 | 1982-11-11 | 1983-05-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-05-12 | 1986-11-11 | 1987-05-13 | $7700.00 | Window Closed / Lapsed |