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Patent US3882483A successfully refreshed from Google Patents.
US3882483A
Expired / Lapsed
US
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Code converter system and method
Assignee: Electronic Associates Inc
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Filing: 1973-05-07
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Granted: 1975-05-06
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Expires: 1993-05-07
Abstract
Abstract A system and method for converting binary coded decimal numbers to binary and for converting binary to binary coded decimal. Read only memories include a programmed mapping between the binary and binary coded decimal codes. Input to the read only memory in one code is converted to an output in the other code. The outputs from the read only memories are summed to produce the desired result.
Inventors
- 👤 Edmund T Burke
- 👤 Donald F Kennedy
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 06:23
CPC Classifications
H; H03; H03M; H03M7/00; H03M7/02; H03M7/12
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
187 words
A system for converting digital input signals to digital output signals between binary coded decimal and binary code signals, comprising: a. hard wired logic means having a programmed mapping between said codes, said logic means having said input signal applied in one of said codes and for producing a signal in the other of said codes, said logic means including a plurality of read only memory means connected each to the other in parallel fashion, each of said read only memory means having a predetermined decade of information applied thereto in said input signal code; b. storage register means for holding predetermined decades of information signals, said storage register means applying said signals to said read only memory means, at least one of said storage register means applying an information signal to each of said read only memory means for determining the sign of a number being applied to said read only memory means in said input signal code; and c. summing means connected to said logic means for summing said signals from said logic means for producing said digital output signal in one of said codes.
Claim 2
Independent Claim
187 words
A system for converting digital input signals to digital output signals between binary coded decimal and binary code signals, comprising: a. hard wired logic means having a programmed mapping between said codes, said logic means having said input signal applied in one of said codes and for producing a signal in the other of said codes, said logic means including a plurality of read only memory means connected each to the other in parallel fashion, each of said read only memory means having a predetermined decade of information applied thereto in said input signal code; b. storage register means for holding predetermined decades of information signals, said storage register means applying said signals to said read only memory means, at least one of said storage register means applying an information signal to each of said read only memory means for determining the sign of a number being applied to said read only memory means in said input signal code; and c. summing means connected to said logic means for summing said signals from said logic means for producing said digital output signal in one of said codes.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-05-05 | 1978-11-04 | 1979-05-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-05-05 | 1982-11-04 | 1983-05-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-05-05 | 1986-11-04 | 1987-05-06 | $7700.00 | Window Closed / Lapsed |